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Searched refs:REG_TC_HDMITX_PLL_47_L (Results 1 – 23 of 23) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/
H A Dhal_dac_tbl.c9523 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
9551 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
9579 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
9607 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
10071 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
10099 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
10127 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
10155 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
10619 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
10647 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/
H A Dhal_dac_tbl.c9414 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
9442 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
9470 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
9498 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
9956 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
9984 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
10012 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
10040 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
10498 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
10526 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/
H A Dhal_dac_tbl.c9522 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
9550 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
9578 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
9606 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
10070 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
10098 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
10126 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
10154 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
10618 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
10646 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/include/
H A Dmdrv_dac_tbl.c9070 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
9098 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
9126 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
9154 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
9595 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
9623 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
9651 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
9679 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
10120 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
10148 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h7397 #define REG_TC_HDMITX_PLL_47_L (REG_TC_HDMITX_PLL_BASE + 0x8E) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/include/
H A Dmdrv_dac_tbl.c9070 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
9098 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
9126 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
9154 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
9595 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
9623 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
9651 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
9679 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
10120 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
10148 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h7397 #define REG_TC_HDMITX_PLL_47_L (REG_TC_HDMITX_PLL_BASE + 0x8E) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/
H A Dhal_dac_tbl.c9414 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
9442 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
9470 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
9498 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
9956 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
9984 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
10012 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
10040 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
10498 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
10526 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/include/
H A Dmdrv_dac_tbl.c9070 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
9098 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
9126 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
9154 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
9595 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
9623 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
9651 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
9679 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
10120 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
10148 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h7397 #define REG_TC_HDMITX_PLL_47_L (REG_TC_HDMITX_PLL_BASE + 0x8E) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/include/
H A Dmdrv_dac_tbl.c9070 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
9098 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
9126 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
9154 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
9595 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
9623 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
9651 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
9679 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
10120 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
10148 { DRV_DAC_REG(REG_TC_HDMITX_PLL_47_L), 0xFF, 0x17/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h7397 #define REG_TC_HDMITX_PLL_47_L (REG_TC_HDMITX_PLL_BASE + 0x8E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/pnl/
H A Dmdrv_dac_tbl.h3458 #define REG_TC_HDMITX_PLL_47_L (REG_TC_HDMITX_PLL_BASE + 0x8E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/pnl/
H A Dmdrv_dac_tbl.h3458 #define REG_TC_HDMITX_PLL_47_L (REG_TC_HDMITX_PLL_BASE + 0x8E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/pnl/
H A Dmdrv_dac_tbl.h3458 #define REG_TC_HDMITX_PLL_47_L (REG_TC_HDMITX_PLL_BASE + 0x8E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/pnl/
H A Dmdrv_dac_tbl.h3458 #define REG_TC_HDMITX_PLL_47_L (REG_TC_HDMITX_PLL_BASE + 0x8E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/pnl/
H A Dmdrv_dac_tbl.h3458 #define REG_TC_HDMITX_PLL_47_L (REG_TC_HDMITX_PLL_BASE + 0x8E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/pnl/
H A Dmdrv_dac_tbl.h3458 #define REG_TC_HDMITX_PLL_47_L (REG_TC_HDMITX_PLL_BASE + 0x8E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/pnl/
H A Dmdrv_dac_tbl.h3458 #define REG_TC_HDMITX_PLL_47_L (REG_TC_HDMITX_PLL_BASE + 0x8E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/pnl/
H A Dmdrv_dac_tbl.h3458 #define REG_TC_HDMITX_PLL_47_L (REG_TC_HDMITX_PLL_BASE + 0x8E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/pnl/
H A Dmdrv_dac_tbl.h3458 #define REG_TC_HDMITX_PLL_47_L (REG_TC_HDMITX_PLL_BASE + 0x8E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/pnl/
H A Dmdrv_dac_tbl.h3458 #define REG_TC_HDMITX_PLL_47_L (REG_TC_HDMITX_PLL_BASE + 0x8E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/pnl/
H A Dmdrv_dac_tbl.h3458 #define REG_TC_HDMITX_PLL_47_L (REG_TC_HDMITX_PLL_BASE + 0x8E) macro