Home
last modified time | relevance | path

Searched refs:REG_TC_HDMITX_PLL_46_H (Results 1 – 23 of 23) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/
H A Dhal_dac_tbl.c9522 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x45/*ALL*/, },
9550 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x45/*ALL*/, },
9578 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x45/*ALL*/, },
9606 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x45/*ALL*/, },
10070 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x45/*ALL*/, },
10098 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x45/*ALL*/, },
10126 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x45/*ALL*/, },
10154 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x45/*ALL*/, },
10618 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x4B/*ALL*/, },
10646 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x4B/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/
H A Dhal_dac_tbl.c9413 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x45/*ALL*/, },
9441 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x45/*ALL*/, },
9469 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x45/*ALL*/, },
9497 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x45/*ALL*/, },
9955 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x45/*ALL*/, },
9983 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x45/*ALL*/, },
10011 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x45/*ALL*/, },
10039 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x45/*ALL*/, },
10497 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x4B/*ALL*/, },
10525 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x4B/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/
H A Dhal_dac_tbl.c9521 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x45/*ALL*/, },
9549 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x45/*ALL*/, },
9577 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x45/*ALL*/, },
9605 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x45/*ALL*/, },
10069 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x45/*ALL*/, },
10097 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x45/*ALL*/, },
10125 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x45/*ALL*/, },
10153 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x45/*ALL*/, },
10617 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x4B/*ALL*/, },
10645 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x4B/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/include/
H A Dmdrv_dac_tbl.c9069 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x45/*ALL*/, },
9097 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x45/*ALL*/, },
9125 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x45/*ALL*/, },
9153 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x45/*ALL*/, },
9594 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x45/*ALL*/, },
9622 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x45/*ALL*/, },
9650 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x45/*ALL*/, },
9678 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x45/*ALL*/, },
10119 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x4B/*ALL*/, },
10147 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x4B/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h7396 #define REG_TC_HDMITX_PLL_46_H (REG_TC_HDMITX_PLL_BASE + 0x8D) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/include/
H A Dmdrv_dac_tbl.c9069 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x45/*ALL*/, },
9097 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x45/*ALL*/, },
9125 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x45/*ALL*/, },
9153 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x45/*ALL*/, },
9594 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x45/*ALL*/, },
9622 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x45/*ALL*/, },
9650 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x45/*ALL*/, },
9678 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x45/*ALL*/, },
10119 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x4B/*ALL*/, },
10147 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x4B/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h7396 #define REG_TC_HDMITX_PLL_46_H (REG_TC_HDMITX_PLL_BASE + 0x8D) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/
H A Dhal_dac_tbl.c9413 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x45/*ALL*/, },
9441 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x45/*ALL*/, },
9469 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x45/*ALL*/, },
9497 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x45/*ALL*/, },
9955 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x45/*ALL*/, },
9983 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x45/*ALL*/, },
10011 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x45/*ALL*/, },
10039 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x45/*ALL*/, },
10497 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x4B/*ALL*/, },
10525 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x4B/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/include/
H A Dmdrv_dac_tbl.c9069 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x45/*ALL*/, },
9097 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x45/*ALL*/, },
9125 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x45/*ALL*/, },
9153 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x45/*ALL*/, },
9594 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x45/*ALL*/, },
9622 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x45/*ALL*/, },
9650 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x45/*ALL*/, },
9678 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x45/*ALL*/, },
10119 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x4B/*ALL*/, },
10147 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x4B/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h7396 #define REG_TC_HDMITX_PLL_46_H (REG_TC_HDMITX_PLL_BASE + 0x8D) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/include/
H A Dmdrv_dac_tbl.c9069 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x45/*ALL*/, },
9097 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x45/*ALL*/, },
9125 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x45/*ALL*/, },
9153 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x45/*ALL*/, },
9594 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x45/*ALL*/, },
9622 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x45/*ALL*/, },
9650 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x45/*ALL*/, },
9678 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x45/*ALL*/, },
10119 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x4B/*ALL*/, },
10147 { DRV_DAC_REG(REG_TC_HDMITX_PLL_46_H), 0xFF, 0x4B/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h7396 #define REG_TC_HDMITX_PLL_46_H (REG_TC_HDMITX_PLL_BASE + 0x8D) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/pnl/
H A Dmdrv_dac_tbl.h3457 #define REG_TC_HDMITX_PLL_46_H (REG_TC_HDMITX_PLL_BASE + 0x8D) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/pnl/
H A Dmdrv_dac_tbl.h3457 #define REG_TC_HDMITX_PLL_46_H (REG_TC_HDMITX_PLL_BASE + 0x8D) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/pnl/
H A Dmdrv_dac_tbl.h3457 #define REG_TC_HDMITX_PLL_46_H (REG_TC_HDMITX_PLL_BASE + 0x8D) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/pnl/
H A Dmdrv_dac_tbl.h3457 #define REG_TC_HDMITX_PLL_46_H (REG_TC_HDMITX_PLL_BASE + 0x8D) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/pnl/
H A Dmdrv_dac_tbl.h3457 #define REG_TC_HDMITX_PLL_46_H (REG_TC_HDMITX_PLL_BASE + 0x8D) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/pnl/
H A Dmdrv_dac_tbl.h3457 #define REG_TC_HDMITX_PLL_46_H (REG_TC_HDMITX_PLL_BASE + 0x8D) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/pnl/
H A Dmdrv_dac_tbl.h3457 #define REG_TC_HDMITX_PLL_46_H (REG_TC_HDMITX_PLL_BASE + 0x8D) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/pnl/
H A Dmdrv_dac_tbl.h3457 #define REG_TC_HDMITX_PLL_46_H (REG_TC_HDMITX_PLL_BASE + 0x8D) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/pnl/
H A Dmdrv_dac_tbl.h3457 #define REG_TC_HDMITX_PLL_46_H (REG_TC_HDMITX_PLL_BASE + 0x8D) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/pnl/
H A Dmdrv_dac_tbl.h3457 #define REG_TC_HDMITX_PLL_46_H (REG_TC_HDMITX_PLL_BASE + 0x8D) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/pnl/
H A Dmdrv_dac_tbl.h3457 #define REG_TC_HDMITX_PLL_46_H (REG_TC_HDMITX_PLL_BASE + 0x8D) macro