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Searched refs:REG_TC_HDMITX_PLL_38_L (Results 1 – 23 of 23) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/
H A Dhal_dac_tbl.c9535 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
9563 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
9591 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
9619 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
10083 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
10111 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
10139 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
10167 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
10631 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
10659 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/
H A Dhal_dac_tbl.c9426 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
9454 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
9482 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
9510 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
9968 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
9996 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
10024 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
10052 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
10510 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
10538 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/
H A Dhal_dac_tbl.c9534 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
9562 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
9590 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
9618 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
10082 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
10110 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
10138 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
10166 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
10630 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
10658 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/include/
H A Dmdrv_dac_tbl.c9082 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
9110 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
9138 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
9166 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
9607 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
9635 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
9663 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
9691 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
10132 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
10160 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h7367 #define REG_TC_HDMITX_PLL_38_L (REG_TC_HDMITX_PLL_BASE + 0x70) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/include/
H A Dmdrv_dac_tbl.c9082 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
9110 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
9138 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
9166 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
9607 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
9635 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
9663 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
9691 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
10132 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
10160 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h7367 #define REG_TC_HDMITX_PLL_38_L (REG_TC_HDMITX_PLL_BASE + 0x70) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/
H A Dhal_dac_tbl.c9426 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
9454 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
9482 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
9510 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
9968 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
9996 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
10024 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
10052 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
10510 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
10538 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/include/
H A Dmdrv_dac_tbl.c9082 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
9110 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
9138 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
9166 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
9607 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
9635 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
9663 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
9691 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
10132 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
10160 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h7367 #define REG_TC_HDMITX_PLL_38_L (REG_TC_HDMITX_PLL_BASE + 0x70) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/include/
H A Dmdrv_dac_tbl.c9082 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
9110 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
9138 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
9166 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
9607 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
9635 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
9663 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
9691 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
10132 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
10160 { DRV_DAC_REG(REG_TC_HDMITX_PLL_38_L), 0xFF, 0x71/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h7367 #define REG_TC_HDMITX_PLL_38_L (REG_TC_HDMITX_PLL_BASE + 0x70) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/pnl/
H A Dmdrv_dac_tbl.h3428 #define REG_TC_HDMITX_PLL_38_L (REG_TC_HDMITX_PLL_BASE + 0x70) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/pnl/
H A Dmdrv_dac_tbl.h3428 #define REG_TC_HDMITX_PLL_38_L (REG_TC_HDMITX_PLL_BASE + 0x70) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/pnl/
H A Dmdrv_dac_tbl.h3428 #define REG_TC_HDMITX_PLL_38_L (REG_TC_HDMITX_PLL_BASE + 0x70) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/pnl/
H A Dmdrv_dac_tbl.h3428 #define REG_TC_HDMITX_PLL_38_L (REG_TC_HDMITX_PLL_BASE + 0x70) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/pnl/
H A Dmdrv_dac_tbl.h3428 #define REG_TC_HDMITX_PLL_38_L (REG_TC_HDMITX_PLL_BASE + 0x70) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/pnl/
H A Dmdrv_dac_tbl.h3428 #define REG_TC_HDMITX_PLL_38_L (REG_TC_HDMITX_PLL_BASE + 0x70) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/pnl/
H A Dmdrv_dac_tbl.h3428 #define REG_TC_HDMITX_PLL_38_L (REG_TC_HDMITX_PLL_BASE + 0x70) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/pnl/
H A Dmdrv_dac_tbl.h3428 #define REG_TC_HDMITX_PLL_38_L (REG_TC_HDMITX_PLL_BASE + 0x70) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/pnl/
H A Dmdrv_dac_tbl.h3428 #define REG_TC_HDMITX_PLL_38_L (REG_TC_HDMITX_PLL_BASE + 0x70) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/pnl/
H A Dmdrv_dac_tbl.h3428 #define REG_TC_HDMITX_PLL_38_L (REG_TC_HDMITX_PLL_BASE + 0x70) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/pnl/
H A Dmdrv_dac_tbl.h3428 #define REG_TC_HDMITX_PLL_38_L (REG_TC_HDMITX_PLL_BASE + 0x70) macro