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Searched refs:REG_TC_HDMITX_PLL_11_H (Results 1 – 23 of 23) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/
H A Dhal_dac_tbl.c448 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x19/*ALL*/, },
481 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x26/*ALL*/, },
514 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x20/*ALL*/, },
547 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x19/*ALL*/, },
979 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x19/*ALL*/, },
1012 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x26/*ALL*/, },
1045 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x20/*ALL*/, },
1078 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x19/*ALL*/, },
1514 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x19/*ALL*/, },
1547 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x26/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/
H A Dhal_dac_tbl.c442 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x19/*ALL*/, },
475 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x26/*ALL*/, },
508 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x20/*ALL*/, },
541 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x19/*ALL*/, },
967 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x19/*ALL*/, },
1000 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x26/*ALL*/, },
1033 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x20/*ALL*/, },
1066 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x19/*ALL*/, },
1496 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x19/*ALL*/, },
1529 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x26/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/
H A Dhal_dac_tbl.c448 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x19/*ALL*/, },
481 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x26/*ALL*/, },
514 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x20/*ALL*/, },
547 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x19/*ALL*/, },
979 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x19/*ALL*/, },
1012 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x26/*ALL*/, },
1045 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x20/*ALL*/, },
1078 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x19/*ALL*/, },
1514 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x19/*ALL*/, },
1547 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x26/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/include/
H A Dmdrv_dac_tbl.c427 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x19/*ALL*/, },
460 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x26/*ALL*/, },
493 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x20/*ALL*/, },
526 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x19/*ALL*/, },
937 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x19/*ALL*/, },
970 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x26/*ALL*/, },
1003 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x20/*ALL*/, },
1036 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x19/*ALL*/, },
1451 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x19/*ALL*/, },
1484 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x26/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h7290 #define REG_TC_HDMITX_PLL_11_H (REG_TC_HDMITX_PLL_BASE + 0x23) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/include/
H A Dmdrv_dac_tbl.c427 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x19/*ALL*/, },
460 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x26/*ALL*/, },
493 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x20/*ALL*/, },
526 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x19/*ALL*/, },
937 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x19/*ALL*/, },
970 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x26/*ALL*/, },
1003 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x20/*ALL*/, },
1036 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x19/*ALL*/, },
1451 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x19/*ALL*/, },
1484 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x26/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h7290 #define REG_TC_HDMITX_PLL_11_H (REG_TC_HDMITX_PLL_BASE + 0x23) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/
H A Dhal_dac_tbl.c442 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x19/*ALL*/, },
475 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x26/*ALL*/, },
508 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x20/*ALL*/, },
541 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x19/*ALL*/, },
967 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x19/*ALL*/, },
1000 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x26/*ALL*/, },
1033 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x20/*ALL*/, },
1066 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x19/*ALL*/, },
1496 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x19/*ALL*/, },
1529 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x26/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/include/
H A Dmdrv_dac_tbl.c427 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x19/*ALL*/, },
460 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x26/*ALL*/, },
493 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x20/*ALL*/, },
526 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x19/*ALL*/, },
937 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x19/*ALL*/, },
970 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x26/*ALL*/, },
1003 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x20/*ALL*/, },
1036 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x19/*ALL*/, },
1451 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x19/*ALL*/, },
1484 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x26/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h7290 #define REG_TC_HDMITX_PLL_11_H (REG_TC_HDMITX_PLL_BASE + 0x23) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/include/
H A Dmdrv_dac_tbl.c427 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x19/*ALL*/, },
460 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x26/*ALL*/, },
493 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x20/*ALL*/, },
526 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x19/*ALL*/, },
937 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x19/*ALL*/, },
970 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x26/*ALL*/, },
1003 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x20/*ALL*/, },
1036 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x19/*ALL*/, },
1451 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x19/*ALL*/, },
1484 { DRV_DAC_REG(REG_TC_HDMITX_PLL_11_H), 0xFF, 0x26/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h7290 #define REG_TC_HDMITX_PLL_11_H (REG_TC_HDMITX_PLL_BASE + 0x23) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/pnl/
H A Dmdrv_dac_tbl.h3351 #define REG_TC_HDMITX_PLL_11_H (REG_TC_HDMITX_PLL_BASE + 0x23) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/pnl/
H A Dmdrv_dac_tbl.h3351 #define REG_TC_HDMITX_PLL_11_H (REG_TC_HDMITX_PLL_BASE + 0x23) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/pnl/
H A Dmdrv_dac_tbl.h3351 #define REG_TC_HDMITX_PLL_11_H (REG_TC_HDMITX_PLL_BASE + 0x23) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/pnl/
H A Dmdrv_dac_tbl.h3351 #define REG_TC_HDMITX_PLL_11_H (REG_TC_HDMITX_PLL_BASE + 0x23) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/pnl/
H A Dmdrv_dac_tbl.h3351 #define REG_TC_HDMITX_PLL_11_H (REG_TC_HDMITX_PLL_BASE + 0x23) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/pnl/
H A Dmdrv_dac_tbl.h3351 #define REG_TC_HDMITX_PLL_11_H (REG_TC_HDMITX_PLL_BASE + 0x23) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/pnl/
H A Dmdrv_dac_tbl.h3351 #define REG_TC_HDMITX_PLL_11_H (REG_TC_HDMITX_PLL_BASE + 0x23) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/pnl/
H A Dmdrv_dac_tbl.h3351 #define REG_TC_HDMITX_PLL_11_H (REG_TC_HDMITX_PLL_BASE + 0x23) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/pnl/
H A Dmdrv_dac_tbl.h3351 #define REG_TC_HDMITX_PLL_11_H (REG_TC_HDMITX_PLL_BASE + 0x23) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/pnl/
H A Dmdrv_dac_tbl.h3351 #define REG_TC_HDMITX_PLL_11_H (REG_TC_HDMITX_PLL_BASE + 0x23) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/pnl/
H A Dmdrv_dac_tbl.h3351 #define REG_TC_HDMITX_PLL_11_H (REG_TC_HDMITX_PLL_BASE + 0x23) macro