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Searched refs:REG_TC_HDGEN_BK1_7B_L (Results 1 – 23 of 23) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/
H A Dhal_dac_tbl.c337 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x00/*ALL*/, },
868 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x00/*ALL*/, },
1403 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x10/*ALL*/, },
1934 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x00/*ALL*/, },
2465 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x00/*ALL*/, },
2996 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x00/*ALL*/, },
3531 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x00/*ALL*/, },
4066 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x00/*ALL*/, },
4597 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x00/*ALL*/, },
5129 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/
H A Dhal_dac_tbl.c329 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x00/*ALL*/, },
854 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x00/*ALL*/, },
1383 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x10/*ALL*/, },
1908 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x00/*ALL*/, },
2433 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x00/*ALL*/, },
2958 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x00/*ALL*/, },
3487 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x00/*ALL*/, },
4016 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x00/*ALL*/, },
4541 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x00/*ALL*/, },
5066 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/
H A Dhal_dac_tbl.c337 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x00/*ALL*/, },
868 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x00/*ALL*/, },
1403 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x10/*ALL*/, },
1934 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x00/*ALL*/, },
2465 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x00/*ALL*/, },
2996 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x00/*ALL*/, },
3531 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x00/*ALL*/, },
4066 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x00/*ALL*/, },
4597 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x00/*ALL*/, },
5128 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/include/
H A Dmdrv_dac_tbl.c332 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x00/*ALL*/, },
842 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x00/*ALL*/, },
1356 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x10/*ALL*/, },
1866 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x00/*ALL*/, },
2376 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x00/*ALL*/, },
2886 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x00/*ALL*/, },
3400 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x00/*ALL*/, },
3914 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x00/*ALL*/, },
4424 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x00/*ALL*/, },
4934 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x00/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6987 #define REG_TC_HDGEN_BK1_7B_L _PK_L_(0x1, 0x7B) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/include/
H A Dmdrv_dac_tbl.c332 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x00/*ALL*/, },
842 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x00/*ALL*/, },
1356 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x10/*ALL*/, },
1866 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x00/*ALL*/, },
2376 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x00/*ALL*/, },
2886 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x00/*ALL*/, },
3400 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x00/*ALL*/, },
3914 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x00/*ALL*/, },
4424 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x00/*ALL*/, },
4934 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x00/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6987 #define REG_TC_HDGEN_BK1_7B_L _PK_L_(0x1, 0x7B) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/
H A Dhal_dac_tbl.c329 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x00/*ALL*/, },
854 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x00/*ALL*/, },
1383 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x10/*ALL*/, },
1908 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x00/*ALL*/, },
2433 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x00/*ALL*/, },
2958 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x00/*ALL*/, },
3487 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x00/*ALL*/, },
4016 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x00/*ALL*/, },
4541 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x00/*ALL*/, },
5066 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/include/
H A Dmdrv_dac_tbl.c332 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x00/*ALL*/, },
842 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x00/*ALL*/, },
1356 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x10/*ALL*/, },
1866 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x00/*ALL*/, },
2376 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x00/*ALL*/, },
2886 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x00/*ALL*/, },
3400 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x00/*ALL*/, },
3914 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x00/*ALL*/, },
4424 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x00/*ALL*/, },
4934 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x00/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6987 #define REG_TC_HDGEN_BK1_7B_L _PK_L_(0x1, 0x7B) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/include/
H A Dmdrv_dac_tbl.c332 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x00/*ALL*/, },
842 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x00/*ALL*/, },
1356 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x10/*ALL*/, },
1866 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x00/*ALL*/, },
2376 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x00/*ALL*/, },
2886 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x00/*ALL*/, },
3400 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x00/*ALL*/, },
3914 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x00/*ALL*/, },
4424 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x00/*ALL*/, },
4934 { DRV_DAC_REG(REG_TC_HDGEN_BK1_7B_L), 0xFF, 0x00/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6987 #define REG_TC_HDGEN_BK1_7B_L _PK_L_(0x1, 0x7B) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/pnl/
H A Dmdrv_dac_tbl.h3305 #define REG_TC_HDGEN_BK1_7B_L _PK_L_(0x1, 0x7B) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/pnl/
H A Dmdrv_dac_tbl.h3305 #define REG_TC_HDGEN_BK1_7B_L _PK_L_(0x1, 0x7B) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/pnl/
H A Dmdrv_dac_tbl.h3305 #define REG_TC_HDGEN_BK1_7B_L _PK_L_(0x1, 0x7B) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/pnl/
H A Dmdrv_dac_tbl.h3305 #define REG_TC_HDGEN_BK1_7B_L _PK_L_(0x1, 0x7B) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/pnl/
H A Dmdrv_dac_tbl.h3305 #define REG_TC_HDGEN_BK1_7B_L _PK_L_(0x1, 0x7B) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/pnl/
H A Dmdrv_dac_tbl.h3305 #define REG_TC_HDGEN_BK1_7B_L _PK_L_(0x1, 0x7B) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/pnl/
H A Dmdrv_dac_tbl.h3305 #define REG_TC_HDGEN_BK1_7B_L _PK_L_(0x1, 0x7B) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/pnl/
H A Dmdrv_dac_tbl.h3305 #define REG_TC_HDGEN_BK1_7B_L _PK_L_(0x1, 0x7B) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/pnl/
H A Dmdrv_dac_tbl.h3305 #define REG_TC_HDGEN_BK1_7B_L _PK_L_(0x1, 0x7B) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/pnl/
H A Dmdrv_dac_tbl.h3305 #define REG_TC_HDGEN_BK1_7B_L _PK_L_(0x1, 0x7B) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/pnl/
H A Dmdrv_dac_tbl.h3305 #define REG_TC_HDGEN_BK1_7B_L _PK_L_(0x1, 0x7B) macro