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Searched refs:REG_TC_HDGEN_BK1_62_L (Results 1 – 23 of 23) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/
H A Dhal_dac_tbl.c409 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x1d/*ALL*/, },
940 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x1d/*ALL*/, },
1475 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x1d/*ALL*/, },
2006 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x1d/*ALL*/, },
2537 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x00/*ALL*/, },
3068 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x00/*ALL*/, },
3603 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x00/*ALL*/, },
4138 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x00/*ALL*/, },
4669 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x1d/*ALL*/, },
5201 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x1d/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/
H A Dhal_dac_tbl.c401 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x1d/*ALL*/, },
926 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x1d/*ALL*/, },
1455 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x1d/*ALL*/, },
1980 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x1d/*ALL*/, },
2505 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x00/*ALL*/, },
3030 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x00/*ALL*/, },
3559 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x00/*ALL*/, },
4088 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x00/*ALL*/, },
4613 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x1d/*ALL*/, },
5138 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x1d/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/
H A Dhal_dac_tbl.c409 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x1d/*ALL*/, },
940 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x1d/*ALL*/, },
1475 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x1d/*ALL*/, },
2006 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x1d/*ALL*/, },
2537 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x00/*ALL*/, },
3068 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x00/*ALL*/, },
3603 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x00/*ALL*/, },
4138 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x00/*ALL*/, },
4669 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x1d/*ALL*/, },
5200 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x1d/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/include/
H A Dmdrv_dac_tbl.c404 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x1d/*ALL*/, },
914 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x1d/*ALL*/, },
1428 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x1d/*ALL*/, },
1938 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x1d/*ALL*/, },
2448 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x00/*ALL*/, },
2958 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x00/*ALL*/, },
3472 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x00/*ALL*/, },
3986 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x00/*ALL*/, },
4496 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x1d/*ALL*/, },
5006 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x1d/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6937 #define REG_TC_HDGEN_BK1_62_L _PK_L_(0x1, 0x62) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/include/
H A Dmdrv_dac_tbl.c404 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x1d/*ALL*/, },
914 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x1d/*ALL*/, },
1428 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x1d/*ALL*/, },
1938 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x1d/*ALL*/, },
2448 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x00/*ALL*/, },
2958 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x00/*ALL*/, },
3472 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x00/*ALL*/, },
3986 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x00/*ALL*/, },
4496 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x1d/*ALL*/, },
5006 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x1d/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6937 #define REG_TC_HDGEN_BK1_62_L _PK_L_(0x1, 0x62) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/
H A Dhal_dac_tbl.c401 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x1d/*ALL*/, },
926 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x1d/*ALL*/, },
1455 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x1d/*ALL*/, },
1980 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x1d/*ALL*/, },
2505 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x00/*ALL*/, },
3030 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x00/*ALL*/, },
3559 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x00/*ALL*/, },
4088 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x00/*ALL*/, },
4613 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x1d/*ALL*/, },
5138 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x1d/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/include/
H A Dmdrv_dac_tbl.c404 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x1d/*ALL*/, },
914 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x1d/*ALL*/, },
1428 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x1d/*ALL*/, },
1938 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x1d/*ALL*/, },
2448 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x00/*ALL*/, },
2958 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x00/*ALL*/, },
3472 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x00/*ALL*/, },
3986 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x00/*ALL*/, },
4496 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x1d/*ALL*/, },
5006 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x1d/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6937 #define REG_TC_HDGEN_BK1_62_L _PK_L_(0x1, 0x62) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/include/
H A Dmdrv_dac_tbl.c404 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x1d/*ALL*/, },
914 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x1d/*ALL*/, },
1428 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x1d/*ALL*/, },
1938 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x1d/*ALL*/, },
2448 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x00/*ALL*/, },
2958 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x00/*ALL*/, },
3472 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x00/*ALL*/, },
3986 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x00/*ALL*/, },
4496 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x1d/*ALL*/, },
5006 { DRV_DAC_REG(REG_TC_HDGEN_BK1_62_L), 0xFF, 0x1d/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6937 #define REG_TC_HDGEN_BK1_62_L _PK_L_(0x1, 0x62) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/pnl/
H A Dmdrv_dac_tbl.h3255 #define REG_TC_HDGEN_BK1_62_L _PK_L_(0x1, 0x62) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/pnl/
H A Dmdrv_dac_tbl.h3255 #define REG_TC_HDGEN_BK1_62_L _PK_L_(0x1, 0x62) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/pnl/
H A Dmdrv_dac_tbl.h3255 #define REG_TC_HDGEN_BK1_62_L _PK_L_(0x1, 0x62) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/pnl/
H A Dmdrv_dac_tbl.h3255 #define REG_TC_HDGEN_BK1_62_L _PK_L_(0x1, 0x62) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/pnl/
H A Dmdrv_dac_tbl.h3255 #define REG_TC_HDGEN_BK1_62_L _PK_L_(0x1, 0x62) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/pnl/
H A Dmdrv_dac_tbl.h3255 #define REG_TC_HDGEN_BK1_62_L _PK_L_(0x1, 0x62) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/pnl/
H A Dmdrv_dac_tbl.h3255 #define REG_TC_HDGEN_BK1_62_L _PK_L_(0x1, 0x62) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/pnl/
H A Dmdrv_dac_tbl.h3255 #define REG_TC_HDGEN_BK1_62_L _PK_L_(0x1, 0x62) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/pnl/
H A Dmdrv_dac_tbl.h3255 #define REG_TC_HDGEN_BK1_62_L _PK_L_(0x1, 0x62) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/pnl/
H A Dmdrv_dac_tbl.h3255 #define REG_TC_HDGEN_BK1_62_L _PK_L_(0x1, 0x62) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/pnl/
H A Dmdrv_dac_tbl.h3255 #define REG_TC_HDGEN_BK1_62_L _PK_L_(0x1, 0x62) macro