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Searched refs:REG_TC_HDGEN_BK1_5B_L (Results 1 – 23 of 23) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/
H A Dhal_dac_tbl.c395 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x61/*ALL*/, },
926 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x61/*ALL*/, },
1461 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x61/*ALL*/, },
1992 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x61/*ALL*/, },
2523 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x00/*ALL*/, },
3054 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x00/*ALL*/, },
3589 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x00/*ALL*/, },
4124 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x00/*ALL*/, },
4655 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x61/*ALL*/, },
5187 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x61/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/
H A Dhal_dac_tbl.c387 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x61/*ALL*/, },
912 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x61/*ALL*/, },
1441 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x61/*ALL*/, },
1966 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x61/*ALL*/, },
2491 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x00/*ALL*/, },
3016 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x00/*ALL*/, },
3545 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x00/*ALL*/, },
4074 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x00/*ALL*/, },
4599 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x61/*ALL*/, },
5124 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x61/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/
H A Dhal_dac_tbl.c395 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x61/*ALL*/, },
926 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x61/*ALL*/, },
1461 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x61/*ALL*/, },
1992 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x61/*ALL*/, },
2523 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x00/*ALL*/, },
3054 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x00/*ALL*/, },
3589 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x00/*ALL*/, },
4124 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x00/*ALL*/, },
4655 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x61/*ALL*/, },
5186 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x61/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/include/
H A Dmdrv_dac_tbl.c390 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x61/*ALL*/, },
900 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x61/*ALL*/, },
1414 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x61/*ALL*/, },
1924 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x61/*ALL*/, },
2434 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x00/*ALL*/, },
2944 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x00/*ALL*/, },
3458 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x00/*ALL*/, },
3972 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x00/*ALL*/, },
4482 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x61/*ALL*/, },
4992 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x61/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6923 #define REG_TC_HDGEN_BK1_5B_L _PK_L_(0x1, 0x5B) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/include/
H A Dmdrv_dac_tbl.c390 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x61/*ALL*/, },
900 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x61/*ALL*/, },
1414 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x61/*ALL*/, },
1924 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x61/*ALL*/, },
2434 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x00/*ALL*/, },
2944 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x00/*ALL*/, },
3458 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x00/*ALL*/, },
3972 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x00/*ALL*/, },
4482 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x61/*ALL*/, },
4992 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x61/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6923 #define REG_TC_HDGEN_BK1_5B_L _PK_L_(0x1, 0x5B) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/
H A Dhal_dac_tbl.c387 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x61/*ALL*/, },
912 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x61/*ALL*/, },
1441 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x61/*ALL*/, },
1966 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x61/*ALL*/, },
2491 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x00/*ALL*/, },
3016 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x00/*ALL*/, },
3545 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x00/*ALL*/, },
4074 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x00/*ALL*/, },
4599 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x61/*ALL*/, },
5124 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x61/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/include/
H A Dmdrv_dac_tbl.c390 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x61/*ALL*/, },
900 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x61/*ALL*/, },
1414 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x61/*ALL*/, },
1924 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x61/*ALL*/, },
2434 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x00/*ALL*/, },
2944 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x00/*ALL*/, },
3458 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x00/*ALL*/, },
3972 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x00/*ALL*/, },
4482 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x61/*ALL*/, },
4992 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x61/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6923 #define REG_TC_HDGEN_BK1_5B_L _PK_L_(0x1, 0x5B) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/include/
H A Dmdrv_dac_tbl.c390 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x61/*ALL*/, },
900 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x61/*ALL*/, },
1414 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x61/*ALL*/, },
1924 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x61/*ALL*/, },
2434 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x00/*ALL*/, },
2944 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x00/*ALL*/, },
3458 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x00/*ALL*/, },
3972 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x00/*ALL*/, },
4482 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x61/*ALL*/, },
4992 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5B_L), 0xFF, 0x61/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6923 #define REG_TC_HDGEN_BK1_5B_L _PK_L_(0x1, 0x5B) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/pnl/
H A Dmdrv_dac_tbl.h3241 #define REG_TC_HDGEN_BK1_5B_L _PK_L_(0x1, 0x5B) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/pnl/
H A Dmdrv_dac_tbl.h3241 #define REG_TC_HDGEN_BK1_5B_L _PK_L_(0x1, 0x5B) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/pnl/
H A Dmdrv_dac_tbl.h3241 #define REG_TC_HDGEN_BK1_5B_L _PK_L_(0x1, 0x5B) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/pnl/
H A Dmdrv_dac_tbl.h3241 #define REG_TC_HDGEN_BK1_5B_L _PK_L_(0x1, 0x5B) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/pnl/
H A Dmdrv_dac_tbl.h3241 #define REG_TC_HDGEN_BK1_5B_L _PK_L_(0x1, 0x5B) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/pnl/
H A Dmdrv_dac_tbl.h3241 #define REG_TC_HDGEN_BK1_5B_L _PK_L_(0x1, 0x5B) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/pnl/
H A Dmdrv_dac_tbl.h3241 #define REG_TC_HDGEN_BK1_5B_L _PK_L_(0x1, 0x5B) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/pnl/
H A Dmdrv_dac_tbl.h3241 #define REG_TC_HDGEN_BK1_5B_L _PK_L_(0x1, 0x5B) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/pnl/
H A Dmdrv_dac_tbl.h3241 #define REG_TC_HDGEN_BK1_5B_L _PK_L_(0x1, 0x5B) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/pnl/
H A Dmdrv_dac_tbl.h3241 #define REG_TC_HDGEN_BK1_5B_L _PK_L_(0x1, 0x5B) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/pnl/
H A Dmdrv_dac_tbl.h3241 #define REG_TC_HDGEN_BK1_5B_L _PK_L_(0x1, 0x5B) macro