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Searched refs:REG_TC_HDGEN_BK1_5A_H (Results 1 – 23 of 23) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/
H A Dhal_dac_tbl.c394 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x01/*ALL*/, },
925 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x01/*ALL*/, },
1460 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x01/*ALL*/, },
1991 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x01/*ALL*/, },
2522 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x00/*ALL*/, },
3053 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x00/*ALL*/, },
3588 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x00/*ALL*/, },
4123 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x00/*ALL*/, },
4654 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x01/*ALL*/, },
5186 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x01/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/
H A Dhal_dac_tbl.c386 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x01/*ALL*/, },
911 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x01/*ALL*/, },
1440 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x01/*ALL*/, },
1965 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x01/*ALL*/, },
2490 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x00/*ALL*/, },
3015 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x00/*ALL*/, },
3544 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x00/*ALL*/, },
4073 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x00/*ALL*/, },
4598 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x01/*ALL*/, },
5123 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x01/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/
H A Dhal_dac_tbl.c394 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x01/*ALL*/, },
925 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x01/*ALL*/, },
1460 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x01/*ALL*/, },
1991 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x01/*ALL*/, },
2522 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x00/*ALL*/, },
3053 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x00/*ALL*/, },
3588 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x00/*ALL*/, },
4123 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x00/*ALL*/, },
4654 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x01/*ALL*/, },
5185 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x01/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/include/
H A Dmdrv_dac_tbl.c389 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x01/*ALL*/, },
899 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x01/*ALL*/, },
1413 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x01/*ALL*/, },
1923 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x01/*ALL*/, },
2433 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x00/*ALL*/, },
2943 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x00/*ALL*/, },
3457 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x00/*ALL*/, },
3971 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x00/*ALL*/, },
4481 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x01/*ALL*/, },
4991 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x01/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6922 #define REG_TC_HDGEN_BK1_5A_H _PK_H_(0x1, 0x5A) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/include/
H A Dmdrv_dac_tbl.c389 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x01/*ALL*/, },
899 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x01/*ALL*/, },
1413 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x01/*ALL*/, },
1923 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x01/*ALL*/, },
2433 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x00/*ALL*/, },
2943 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x00/*ALL*/, },
3457 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x00/*ALL*/, },
3971 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x00/*ALL*/, },
4481 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x01/*ALL*/, },
4991 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x01/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6922 #define REG_TC_HDGEN_BK1_5A_H _PK_H_(0x1, 0x5A) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/
H A Dhal_dac_tbl.c386 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x01/*ALL*/, },
911 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x01/*ALL*/, },
1440 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x01/*ALL*/, },
1965 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x01/*ALL*/, },
2490 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x00/*ALL*/, },
3015 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x00/*ALL*/, },
3544 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x00/*ALL*/, },
4073 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x00/*ALL*/, },
4598 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x01/*ALL*/, },
5123 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x01/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/include/
H A Dmdrv_dac_tbl.c389 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x01/*ALL*/, },
899 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x01/*ALL*/, },
1413 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x01/*ALL*/, },
1923 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x01/*ALL*/, },
2433 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x00/*ALL*/, },
2943 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x00/*ALL*/, },
3457 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x00/*ALL*/, },
3971 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x00/*ALL*/, },
4481 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x01/*ALL*/, },
4991 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x01/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6922 #define REG_TC_HDGEN_BK1_5A_H _PK_H_(0x1, 0x5A) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/include/
H A Dmdrv_dac_tbl.c389 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x01/*ALL*/, },
899 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x01/*ALL*/, },
1413 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x01/*ALL*/, },
1923 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x01/*ALL*/, },
2433 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x00/*ALL*/, },
2943 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x00/*ALL*/, },
3457 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x00/*ALL*/, },
3971 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x00/*ALL*/, },
4481 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x01/*ALL*/, },
4991 { DRV_DAC_REG(REG_TC_HDGEN_BK1_5A_H), 0xFF, 0x01/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6922 #define REG_TC_HDGEN_BK1_5A_H _PK_H_(0x1, 0x5A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/pnl/
H A Dmdrv_dac_tbl.h3240 #define REG_TC_HDGEN_BK1_5A_H _PK_H_(0x1, 0x5A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/pnl/
H A Dmdrv_dac_tbl.h3240 #define REG_TC_HDGEN_BK1_5A_H _PK_H_(0x1, 0x5A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/pnl/
H A Dmdrv_dac_tbl.h3240 #define REG_TC_HDGEN_BK1_5A_H _PK_H_(0x1, 0x5A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/pnl/
H A Dmdrv_dac_tbl.h3240 #define REG_TC_HDGEN_BK1_5A_H _PK_H_(0x1, 0x5A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/pnl/
H A Dmdrv_dac_tbl.h3240 #define REG_TC_HDGEN_BK1_5A_H _PK_H_(0x1, 0x5A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/pnl/
H A Dmdrv_dac_tbl.h3240 #define REG_TC_HDGEN_BK1_5A_H _PK_H_(0x1, 0x5A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/pnl/
H A Dmdrv_dac_tbl.h3240 #define REG_TC_HDGEN_BK1_5A_H _PK_H_(0x1, 0x5A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/pnl/
H A Dmdrv_dac_tbl.h3240 #define REG_TC_HDGEN_BK1_5A_H _PK_H_(0x1, 0x5A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/pnl/
H A Dmdrv_dac_tbl.h3240 #define REG_TC_HDGEN_BK1_5A_H _PK_H_(0x1, 0x5A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/pnl/
H A Dmdrv_dac_tbl.h3240 #define REG_TC_HDGEN_BK1_5A_H _PK_H_(0x1, 0x5A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/pnl/
H A Dmdrv_dac_tbl.h3240 #define REG_TC_HDGEN_BK1_5A_H _PK_H_(0x1, 0x5A) macro