Home
last modified time | relevance | path

Searched refs:REG_TC_HDGEN_BK1_59_L (Results 1 – 23 of 23) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/
H A Dhal_dac_tbl.c391 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x06/*ALL*/, },
922 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x06/*ALL*/, },
1457 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x06/*ALL*/, },
1988 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x06/*ALL*/, },
2519 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x00/*ALL*/, },
3050 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x00/*ALL*/, },
3585 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x00/*ALL*/, },
4120 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x00/*ALL*/, },
4651 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x06/*ALL*/, },
5183 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x06/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/
H A Dhal_dac_tbl.c383 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x06/*ALL*/, },
908 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x06/*ALL*/, },
1437 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x06/*ALL*/, },
1962 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x06/*ALL*/, },
2487 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x00/*ALL*/, },
3012 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x00/*ALL*/, },
3541 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x00/*ALL*/, },
4070 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x00/*ALL*/, },
4595 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x06/*ALL*/, },
5120 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x06/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/
H A Dhal_dac_tbl.c391 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x06/*ALL*/, },
922 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x06/*ALL*/, },
1457 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x06/*ALL*/, },
1988 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x06/*ALL*/, },
2519 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x00/*ALL*/, },
3050 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x00/*ALL*/, },
3585 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x00/*ALL*/, },
4120 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x00/*ALL*/, },
4651 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x06/*ALL*/, },
5182 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x06/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/include/
H A Dmdrv_dac_tbl.c386 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x06/*ALL*/, },
896 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x06/*ALL*/, },
1410 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x06/*ALL*/, },
1920 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x06/*ALL*/, },
2430 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x00/*ALL*/, },
2940 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x00/*ALL*/, },
3454 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x00/*ALL*/, },
3968 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x00/*ALL*/, },
4478 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x06/*ALL*/, },
4988 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x06/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6919 #define REG_TC_HDGEN_BK1_59_L _PK_L_(0x1, 0x59) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/include/
H A Dmdrv_dac_tbl.c386 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x06/*ALL*/, },
896 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x06/*ALL*/, },
1410 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x06/*ALL*/, },
1920 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x06/*ALL*/, },
2430 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x00/*ALL*/, },
2940 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x00/*ALL*/, },
3454 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x00/*ALL*/, },
3968 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x00/*ALL*/, },
4478 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x06/*ALL*/, },
4988 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x06/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6919 #define REG_TC_HDGEN_BK1_59_L _PK_L_(0x1, 0x59) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/
H A Dhal_dac_tbl.c383 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x06/*ALL*/, },
908 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x06/*ALL*/, },
1437 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x06/*ALL*/, },
1962 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x06/*ALL*/, },
2487 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x00/*ALL*/, },
3012 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x00/*ALL*/, },
3541 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x00/*ALL*/, },
4070 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x00/*ALL*/, },
4595 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x06/*ALL*/, },
5120 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x06/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/include/
H A Dmdrv_dac_tbl.c386 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x06/*ALL*/, },
896 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x06/*ALL*/, },
1410 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x06/*ALL*/, },
1920 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x06/*ALL*/, },
2430 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x00/*ALL*/, },
2940 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x00/*ALL*/, },
3454 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x00/*ALL*/, },
3968 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x00/*ALL*/, },
4478 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x06/*ALL*/, },
4988 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x06/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6919 #define REG_TC_HDGEN_BK1_59_L _PK_L_(0x1, 0x59) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/include/
H A Dmdrv_dac_tbl.c386 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x06/*ALL*/, },
896 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x06/*ALL*/, },
1410 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x06/*ALL*/, },
1920 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x06/*ALL*/, },
2430 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x00/*ALL*/, },
2940 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x00/*ALL*/, },
3454 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x00/*ALL*/, },
3968 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x00/*ALL*/, },
4478 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x06/*ALL*/, },
4988 { DRV_DAC_REG(REG_TC_HDGEN_BK1_59_L), 0xFF, 0x06/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6919 #define REG_TC_HDGEN_BK1_59_L _PK_L_(0x1, 0x59) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/pnl/
H A Dmdrv_dac_tbl.h3237 #define REG_TC_HDGEN_BK1_59_L _PK_L_(0x1, 0x59) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/pnl/
H A Dmdrv_dac_tbl.h3237 #define REG_TC_HDGEN_BK1_59_L _PK_L_(0x1, 0x59) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/pnl/
H A Dmdrv_dac_tbl.h3237 #define REG_TC_HDGEN_BK1_59_L _PK_L_(0x1, 0x59) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/pnl/
H A Dmdrv_dac_tbl.h3237 #define REG_TC_HDGEN_BK1_59_L _PK_L_(0x1, 0x59) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/pnl/
H A Dmdrv_dac_tbl.h3237 #define REG_TC_HDGEN_BK1_59_L _PK_L_(0x1, 0x59) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/pnl/
H A Dmdrv_dac_tbl.h3237 #define REG_TC_HDGEN_BK1_59_L _PK_L_(0x1, 0x59) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/pnl/
H A Dmdrv_dac_tbl.h3237 #define REG_TC_HDGEN_BK1_59_L _PK_L_(0x1, 0x59) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/pnl/
H A Dmdrv_dac_tbl.h3237 #define REG_TC_HDGEN_BK1_59_L _PK_L_(0x1, 0x59) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/pnl/
H A Dmdrv_dac_tbl.h3237 #define REG_TC_HDGEN_BK1_59_L _PK_L_(0x1, 0x59) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/pnl/
H A Dmdrv_dac_tbl.h3237 #define REG_TC_HDGEN_BK1_59_L _PK_L_(0x1, 0x59) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/pnl/
H A Dmdrv_dac_tbl.h3237 #define REG_TC_HDGEN_BK1_59_L _PK_L_(0x1, 0x59) macro