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Searched refs:REG_TC_HDGEN_BK1_52_L (Results 1 – 23 of 23) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/
H A Dhal_dac_tbl.c377 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0xa7/*ALL*/, },
908 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0xa7/*ALL*/, },
1443 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0xa7/*ALL*/, },
1974 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0xa7/*ALL*/, },
2505 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0x87/*ALL*/, },
3036 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0x87/*ALL*/, },
3571 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0x87/*ALL*/, },
4106 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0x87/*ALL*/, },
4637 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0xa3/*ALL*/, },
5169 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0xa3/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/
H A Dhal_dac_tbl.c369 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0xa7/*ALL*/, },
894 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0xa7/*ALL*/, },
1423 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0xa7/*ALL*/, },
1948 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0xa7/*ALL*/, },
2473 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0x87/*ALL*/, },
2998 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0x87/*ALL*/, },
3527 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0x87/*ALL*/, },
4056 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0x87/*ALL*/, },
4581 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0xa3/*ALL*/, },
5106 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0xa3/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/
H A Dhal_dac_tbl.c377 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0xa7/*ALL*/, },
908 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0xa7/*ALL*/, },
1443 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0xa7/*ALL*/, },
1974 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0xa7/*ALL*/, },
2505 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0x87/*ALL*/, },
3036 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0x87/*ALL*/, },
3571 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0x87/*ALL*/, },
4106 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0x87/*ALL*/, },
4637 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0xa3/*ALL*/, },
5168 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0xa3/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/include/
H A Dmdrv_dac_tbl.c372 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0xa7/*ALL*/, },
882 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0xa7/*ALL*/, },
1396 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0xa7/*ALL*/, },
1906 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0xa7/*ALL*/, },
2416 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0x87/*ALL*/, },
2926 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0x87/*ALL*/, },
3440 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0x87/*ALL*/, },
3954 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0x87/*ALL*/, },
4464 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0xa3/*ALL*/, },
4974 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0xa3/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6905 #define REG_TC_HDGEN_BK1_52_L _PK_L_(0x1, 0x52) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/include/
H A Dmdrv_dac_tbl.c372 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0xa7/*ALL*/, },
882 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0xa7/*ALL*/, },
1396 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0xa7/*ALL*/, },
1906 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0xa7/*ALL*/, },
2416 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0x87/*ALL*/, },
2926 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0x87/*ALL*/, },
3440 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0x87/*ALL*/, },
3954 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0x87/*ALL*/, },
4464 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0xa3/*ALL*/, },
4974 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0xa3/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6905 #define REG_TC_HDGEN_BK1_52_L _PK_L_(0x1, 0x52) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/
H A Dhal_dac_tbl.c369 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0xa7/*ALL*/, },
894 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0xa7/*ALL*/, },
1423 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0xa7/*ALL*/, },
1948 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0xa7/*ALL*/, },
2473 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0x87/*ALL*/, },
2998 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0x87/*ALL*/, },
3527 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0x87/*ALL*/, },
4056 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0x87/*ALL*/, },
4581 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0xa3/*ALL*/, },
5106 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0xa3/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/include/
H A Dmdrv_dac_tbl.c372 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0xa7/*ALL*/, },
882 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0xa7/*ALL*/, },
1396 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0xa7/*ALL*/, },
1906 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0xa7/*ALL*/, },
2416 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0x87/*ALL*/, },
2926 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0x87/*ALL*/, },
3440 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0x87/*ALL*/, },
3954 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0x87/*ALL*/, },
4464 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0xa3/*ALL*/, },
4974 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0xa3/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6905 #define REG_TC_HDGEN_BK1_52_L _PK_L_(0x1, 0x52) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/include/
H A Dmdrv_dac_tbl.c372 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0xa7/*ALL*/, },
882 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0xa7/*ALL*/, },
1396 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0xa7/*ALL*/, },
1906 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0xa7/*ALL*/, },
2416 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0x87/*ALL*/, },
2926 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0x87/*ALL*/, },
3440 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0x87/*ALL*/, },
3954 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0x87/*ALL*/, },
4464 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0xa3/*ALL*/, },
4974 { DRV_DAC_REG(REG_TC_HDGEN_BK1_52_L), 0xFF, 0xa3/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6905 #define REG_TC_HDGEN_BK1_52_L _PK_L_(0x1, 0x52) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/pnl/
H A Dmdrv_dac_tbl.h3223 #define REG_TC_HDGEN_BK1_52_L _PK_L_(0x1, 0x52) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/pnl/
H A Dmdrv_dac_tbl.h3223 #define REG_TC_HDGEN_BK1_52_L _PK_L_(0x1, 0x52) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/pnl/
H A Dmdrv_dac_tbl.h3223 #define REG_TC_HDGEN_BK1_52_L _PK_L_(0x1, 0x52) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/pnl/
H A Dmdrv_dac_tbl.h3223 #define REG_TC_HDGEN_BK1_52_L _PK_L_(0x1, 0x52) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/pnl/
H A Dmdrv_dac_tbl.h3223 #define REG_TC_HDGEN_BK1_52_L _PK_L_(0x1, 0x52) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/pnl/
H A Dmdrv_dac_tbl.h3223 #define REG_TC_HDGEN_BK1_52_L _PK_L_(0x1, 0x52) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/pnl/
H A Dmdrv_dac_tbl.h3223 #define REG_TC_HDGEN_BK1_52_L _PK_L_(0x1, 0x52) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/pnl/
H A Dmdrv_dac_tbl.h3223 #define REG_TC_HDGEN_BK1_52_L _PK_L_(0x1, 0x52) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/pnl/
H A Dmdrv_dac_tbl.h3223 #define REG_TC_HDGEN_BK1_52_L _PK_L_(0x1, 0x52) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/pnl/
H A Dmdrv_dac_tbl.h3223 #define REG_TC_HDGEN_BK1_52_L _PK_L_(0x1, 0x52) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/pnl/
H A Dmdrv_dac_tbl.h3223 #define REG_TC_HDGEN_BK1_52_L _PK_L_(0x1, 0x52) macro