Home
last modified time | relevance | path

Searched refs:REG_TC_HDGEN_BK1_50_L (Results 1 – 23 of 23) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/
H A Dhal_dac_tbl.c373 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x27/*ALL*/, },
904 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x27/*ALL*/, },
1439 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x27/*ALL*/, },
1970 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x27/*ALL*/, },
2501 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x07/*ALL*/, },
3032 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x07/*ALL*/, },
3567 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x07/*ALL*/, },
4102 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x07/*ALL*/, },
4633 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x23/*ALL*/, },
5165 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x23/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/
H A Dhal_dac_tbl.c365 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x27/*ALL*/, },
890 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x27/*ALL*/, },
1419 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x27/*ALL*/, },
1944 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x27/*ALL*/, },
2469 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x07/*ALL*/, },
2994 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x07/*ALL*/, },
3523 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x07/*ALL*/, },
4052 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x07/*ALL*/, },
4577 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x23/*ALL*/, },
5102 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x23/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/
H A Dhal_dac_tbl.c373 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x27/*ALL*/, },
904 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x27/*ALL*/, },
1439 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x27/*ALL*/, },
1970 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x27/*ALL*/, },
2501 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x07/*ALL*/, },
3032 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x07/*ALL*/, },
3567 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x07/*ALL*/, },
4102 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x07/*ALL*/, },
4633 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x23/*ALL*/, },
5164 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x23/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/include/
H A Dmdrv_dac_tbl.c368 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x27/*ALL*/, },
878 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x27/*ALL*/, },
1392 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x27/*ALL*/, },
1902 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x27/*ALL*/, },
2412 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x07/*ALL*/, },
2922 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x07/*ALL*/, },
3436 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x07/*ALL*/, },
3950 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x07/*ALL*/, },
4460 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x23/*ALL*/, },
4970 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x23/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6901 #define REG_TC_HDGEN_BK1_50_L _PK_L_(0x1, 0x50) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/include/
H A Dmdrv_dac_tbl.c368 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x27/*ALL*/, },
878 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x27/*ALL*/, },
1392 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x27/*ALL*/, },
1902 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x27/*ALL*/, },
2412 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x07/*ALL*/, },
2922 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x07/*ALL*/, },
3436 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x07/*ALL*/, },
3950 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x07/*ALL*/, },
4460 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x23/*ALL*/, },
4970 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x23/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6901 #define REG_TC_HDGEN_BK1_50_L _PK_L_(0x1, 0x50) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/
H A Dhal_dac_tbl.c365 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x27/*ALL*/, },
890 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x27/*ALL*/, },
1419 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x27/*ALL*/, },
1944 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x27/*ALL*/, },
2469 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x07/*ALL*/, },
2994 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x07/*ALL*/, },
3523 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x07/*ALL*/, },
4052 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x07/*ALL*/, },
4577 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x23/*ALL*/, },
5102 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x23/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/include/
H A Dmdrv_dac_tbl.c368 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x27/*ALL*/, },
878 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x27/*ALL*/, },
1392 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x27/*ALL*/, },
1902 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x27/*ALL*/, },
2412 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x07/*ALL*/, },
2922 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x07/*ALL*/, },
3436 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x07/*ALL*/, },
3950 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x07/*ALL*/, },
4460 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x23/*ALL*/, },
4970 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x23/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6901 #define REG_TC_HDGEN_BK1_50_L _PK_L_(0x1, 0x50) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/include/
H A Dmdrv_dac_tbl.c368 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x27/*ALL*/, },
878 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x27/*ALL*/, },
1392 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x27/*ALL*/, },
1902 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x27/*ALL*/, },
2412 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x07/*ALL*/, },
2922 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x07/*ALL*/, },
3436 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x07/*ALL*/, },
3950 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x07/*ALL*/, },
4460 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x23/*ALL*/, },
4970 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_L), 0xFF, 0x23/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6901 #define REG_TC_HDGEN_BK1_50_L _PK_L_(0x1, 0x50) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/pnl/
H A Dmdrv_dac_tbl.h3219 #define REG_TC_HDGEN_BK1_50_L _PK_L_(0x1, 0x50) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/pnl/
H A Dmdrv_dac_tbl.h3219 #define REG_TC_HDGEN_BK1_50_L _PK_L_(0x1, 0x50) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/pnl/
H A Dmdrv_dac_tbl.h3219 #define REG_TC_HDGEN_BK1_50_L _PK_L_(0x1, 0x50) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/pnl/
H A Dmdrv_dac_tbl.h3219 #define REG_TC_HDGEN_BK1_50_L _PK_L_(0x1, 0x50) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/pnl/
H A Dmdrv_dac_tbl.h3219 #define REG_TC_HDGEN_BK1_50_L _PK_L_(0x1, 0x50) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/pnl/
H A Dmdrv_dac_tbl.h3219 #define REG_TC_HDGEN_BK1_50_L _PK_L_(0x1, 0x50) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/pnl/
H A Dmdrv_dac_tbl.h3219 #define REG_TC_HDGEN_BK1_50_L _PK_L_(0x1, 0x50) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/pnl/
H A Dmdrv_dac_tbl.h3219 #define REG_TC_HDGEN_BK1_50_L _PK_L_(0x1, 0x50) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/pnl/
H A Dmdrv_dac_tbl.h3219 #define REG_TC_HDGEN_BK1_50_L _PK_L_(0x1, 0x50) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/pnl/
H A Dmdrv_dac_tbl.h3219 #define REG_TC_HDGEN_BK1_50_L _PK_L_(0x1, 0x50) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/pnl/
H A Dmdrv_dac_tbl.h3219 #define REG_TC_HDGEN_BK1_50_L _PK_L_(0x1, 0x50) macro