Home
last modified time | relevance | path

Searched refs:REG_TC_HDGEN_BK1_50_H (Results 1 – 23 of 23) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/
H A Dhal_dac_tbl.c374 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
905 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
1440 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
1971 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
2502 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
3033 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
3568 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
4103 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
4634 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
5166 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/
H A Dhal_dac_tbl.c366 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
891 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
1420 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
1945 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
2470 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
2995 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
3524 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
4053 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
4578 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
5103 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/
H A Dhal_dac_tbl.c374 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
905 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
1440 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
1971 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
2502 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
3033 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
3568 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
4103 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
4634 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
5165 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/include/
H A Dmdrv_dac_tbl.c369 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
879 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
1393 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
1903 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
2413 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
2923 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
3437 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
3951 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
4461 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
4971 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6902 #define REG_TC_HDGEN_BK1_50_H _PK_H_(0x1, 0x50) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/include/
H A Dmdrv_dac_tbl.c369 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
879 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
1393 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
1903 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
2413 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
2923 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
3437 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
3951 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
4461 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
4971 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6902 #define REG_TC_HDGEN_BK1_50_H _PK_H_(0x1, 0x50) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/
H A Dhal_dac_tbl.c366 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
891 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
1420 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
1945 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
2470 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
2995 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
3524 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
4053 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
4578 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
5103 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/include/
H A Dmdrv_dac_tbl.c369 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
879 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
1393 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
1903 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
2413 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
2923 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
3437 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
3951 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
4461 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
4971 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6902 #define REG_TC_HDGEN_BK1_50_H _PK_H_(0x1, 0x50) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/include/
H A Dmdrv_dac_tbl.c369 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
879 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
1393 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
1903 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
2413 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
2923 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
3437 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
3951 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
4461 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
4971 { DRV_DAC_REG(REG_TC_HDGEN_BK1_50_H), 0xFF, 0x01/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6902 #define REG_TC_HDGEN_BK1_50_H _PK_H_(0x1, 0x50) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/pnl/
H A Dmdrv_dac_tbl.h3220 #define REG_TC_HDGEN_BK1_50_H _PK_H_(0x1, 0x50) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/pnl/
H A Dmdrv_dac_tbl.h3220 #define REG_TC_HDGEN_BK1_50_H _PK_H_(0x1, 0x50) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/pnl/
H A Dmdrv_dac_tbl.h3220 #define REG_TC_HDGEN_BK1_50_H _PK_H_(0x1, 0x50) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/pnl/
H A Dmdrv_dac_tbl.h3220 #define REG_TC_HDGEN_BK1_50_H _PK_H_(0x1, 0x50) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/pnl/
H A Dmdrv_dac_tbl.h3220 #define REG_TC_HDGEN_BK1_50_H _PK_H_(0x1, 0x50) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/pnl/
H A Dmdrv_dac_tbl.h3220 #define REG_TC_HDGEN_BK1_50_H _PK_H_(0x1, 0x50) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/pnl/
H A Dmdrv_dac_tbl.h3220 #define REG_TC_HDGEN_BK1_50_H _PK_H_(0x1, 0x50) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/pnl/
H A Dmdrv_dac_tbl.h3220 #define REG_TC_HDGEN_BK1_50_H _PK_H_(0x1, 0x50) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/pnl/
H A Dmdrv_dac_tbl.h3220 #define REG_TC_HDGEN_BK1_50_H _PK_H_(0x1, 0x50) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/pnl/
H A Dmdrv_dac_tbl.h3220 #define REG_TC_HDGEN_BK1_50_H _PK_H_(0x1, 0x50) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/pnl/
H A Dmdrv_dac_tbl.h3220 #define REG_TC_HDGEN_BK1_50_H _PK_H_(0x1, 0x50) macro