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Searched refs:REG_TC_HDGEN_BK1_4E_L (Results 1 – 23 of 23) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/
H A Dhal_dac_tbl.c369 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0xd4/*ALL*/, },
900 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0xd4/*ALL*/, },
1435 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0xd4/*ALL*/, },
1966 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0xd4/*ALL*/, },
2497 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0x00/*ALL*/, },
3028 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0x00/*ALL*/, },
3563 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0x00/*ALL*/, },
4098 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0x00/*ALL*/, },
4629 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0xdc/*ALL*/, },
5161 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0xdc/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/
H A Dhal_dac_tbl.c361 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0xd4/*ALL*/, },
886 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0xd4/*ALL*/, },
1415 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0xd4/*ALL*/, },
1940 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0xd4/*ALL*/, },
2465 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0x00/*ALL*/, },
2990 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0x00/*ALL*/, },
3519 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0x00/*ALL*/, },
4048 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0x00/*ALL*/, },
4573 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0xdc/*ALL*/, },
5098 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0xdc/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/
H A Dhal_dac_tbl.c369 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0xd4/*ALL*/, },
900 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0xd4/*ALL*/, },
1435 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0xd4/*ALL*/, },
1966 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0xd4/*ALL*/, },
2497 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0x00/*ALL*/, },
3028 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0x00/*ALL*/, },
3563 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0x00/*ALL*/, },
4098 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0x00/*ALL*/, },
4629 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0xdc/*ALL*/, },
5160 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0xdc/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/include/
H A Dmdrv_dac_tbl.c364 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0xd4/*ALL*/, },
874 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0xd4/*ALL*/, },
1388 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0xd4/*ALL*/, },
1898 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0xd4/*ALL*/, },
2408 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0x00/*ALL*/, },
2918 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0x00/*ALL*/, },
3432 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0x00/*ALL*/, },
3946 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0x00/*ALL*/, },
4456 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0xdc/*ALL*/, },
4966 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0xdc/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6897 #define REG_TC_HDGEN_BK1_4E_L _PK_L_(0x1, 0x4E) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/include/
H A Dmdrv_dac_tbl.c364 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0xd4/*ALL*/, },
874 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0xd4/*ALL*/, },
1388 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0xd4/*ALL*/, },
1898 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0xd4/*ALL*/, },
2408 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0x00/*ALL*/, },
2918 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0x00/*ALL*/, },
3432 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0x00/*ALL*/, },
3946 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0x00/*ALL*/, },
4456 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0xdc/*ALL*/, },
4966 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0xdc/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6897 #define REG_TC_HDGEN_BK1_4E_L _PK_L_(0x1, 0x4E) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/
H A Dhal_dac_tbl.c361 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0xd4/*ALL*/, },
886 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0xd4/*ALL*/, },
1415 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0xd4/*ALL*/, },
1940 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0xd4/*ALL*/, },
2465 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0x00/*ALL*/, },
2990 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0x00/*ALL*/, },
3519 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0x00/*ALL*/, },
4048 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0x00/*ALL*/, },
4573 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0xdc/*ALL*/, },
5098 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0xdc/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/include/
H A Dmdrv_dac_tbl.c364 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0xd4/*ALL*/, },
874 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0xd4/*ALL*/, },
1388 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0xd4/*ALL*/, },
1898 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0xd4/*ALL*/, },
2408 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0x00/*ALL*/, },
2918 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0x00/*ALL*/, },
3432 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0x00/*ALL*/, },
3946 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0x00/*ALL*/, },
4456 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0xdc/*ALL*/, },
4966 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0xdc/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6897 #define REG_TC_HDGEN_BK1_4E_L _PK_L_(0x1, 0x4E) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/include/
H A Dmdrv_dac_tbl.c364 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0xd4/*ALL*/, },
874 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0xd4/*ALL*/, },
1388 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0xd4/*ALL*/, },
1898 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0xd4/*ALL*/, },
2408 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0x00/*ALL*/, },
2918 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0x00/*ALL*/, },
3432 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0x00/*ALL*/, },
3946 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0x00/*ALL*/, },
4456 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0xdc/*ALL*/, },
4966 { DRV_DAC_REG(REG_TC_HDGEN_BK1_4E_L), 0xFF, 0xdc/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6897 #define REG_TC_HDGEN_BK1_4E_L _PK_L_(0x1, 0x4E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/pnl/
H A Dmdrv_dac_tbl.h3215 #define REG_TC_HDGEN_BK1_4E_L _PK_L_(0x1, 0x4E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/pnl/
H A Dmdrv_dac_tbl.h3215 #define REG_TC_HDGEN_BK1_4E_L _PK_L_(0x1, 0x4E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/pnl/
H A Dmdrv_dac_tbl.h3215 #define REG_TC_HDGEN_BK1_4E_L _PK_L_(0x1, 0x4E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/pnl/
H A Dmdrv_dac_tbl.h3215 #define REG_TC_HDGEN_BK1_4E_L _PK_L_(0x1, 0x4E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/pnl/
H A Dmdrv_dac_tbl.h3215 #define REG_TC_HDGEN_BK1_4E_L _PK_L_(0x1, 0x4E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/pnl/
H A Dmdrv_dac_tbl.h3215 #define REG_TC_HDGEN_BK1_4E_L _PK_L_(0x1, 0x4E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/pnl/
H A Dmdrv_dac_tbl.h3215 #define REG_TC_HDGEN_BK1_4E_L _PK_L_(0x1, 0x4E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/pnl/
H A Dmdrv_dac_tbl.h3215 #define REG_TC_HDGEN_BK1_4E_L _PK_L_(0x1, 0x4E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/pnl/
H A Dmdrv_dac_tbl.h3215 #define REG_TC_HDGEN_BK1_4E_L _PK_L_(0x1, 0x4E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/pnl/
H A Dmdrv_dac_tbl.h3215 #define REG_TC_HDGEN_BK1_4E_L _PK_L_(0x1, 0x4E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/pnl/
H A Dmdrv_dac_tbl.h3215 #define REG_TC_HDGEN_BK1_4E_L _PK_L_(0x1, 0x4E) macro