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Searched refs:REG_TC_HDGEN_BK1_42_L (Results 1 – 23 of 23) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/
H A Dhal_dac_tbl.c345 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0x16/*ALL*/, },
876 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0x16/*ALL*/, },
1411 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0x16/*ALL*/, },
1942 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0x16/*ALL*/, },
2473 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0x56/*ALL*/, },
3004 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0x56/*ALL*/, },
3539 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0x56/*ALL*/, },
4074 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0x56/*ALL*/, },
4605 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0x40/*ALL*/, },
5137 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0x40/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/
H A Dhal_dac_tbl.c337 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0x16/*ALL*/, },
862 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0x16/*ALL*/, },
1391 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0x16/*ALL*/, },
1916 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0x16/*ALL*/, },
2441 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0xB4/*ALL*/, },
2966 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0xB4/*ALL*/, },
3495 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0x56/*ALL*/, },
4024 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0x56/*ALL*/, },
4549 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0xB4/*ALL*/, },
5074 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0xB4/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/
H A Dhal_dac_tbl.c345 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0x16/*ALL*/, },
876 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0x16/*ALL*/, },
1411 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0x16/*ALL*/, },
1942 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0x16/*ALL*/, },
2473 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0x56/*ALL*/, },
3004 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0x56/*ALL*/, },
3539 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0x56/*ALL*/, },
4074 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0x56/*ALL*/, },
4605 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0x40/*ALL*/, },
5136 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0x40/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/include/
H A Dmdrv_dac_tbl.c340 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0x16/*ALL*/, },
850 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0x16/*ALL*/, },
1364 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0x16/*ALL*/, },
1874 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0x16/*ALL*/, },
2384 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0x56/*ALL*/, },
2894 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0x56/*ALL*/, },
3408 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0x56/*ALL*/, },
3922 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0x56/*ALL*/, },
4432 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0x40/*ALL*/, },
4942 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0x40/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6873 #define REG_TC_HDGEN_BK1_42_L _PK_L_(0x1, 0x42) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/include/
H A Dmdrv_dac_tbl.c340 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0x16/*ALL*/, },
850 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0x16/*ALL*/, },
1364 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0x16/*ALL*/, },
1874 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0x16/*ALL*/, },
2384 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0x56/*ALL*/, },
2894 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0x56/*ALL*/, },
3408 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0x56/*ALL*/, },
3922 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0x56/*ALL*/, },
4432 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0x40/*ALL*/, },
4942 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0x40/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6873 #define REG_TC_HDGEN_BK1_42_L _PK_L_(0x1, 0x42) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/
H A Dhal_dac_tbl.c337 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0x16/*ALL*/, },
862 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0x16/*ALL*/, },
1391 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0x16/*ALL*/, },
1916 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0x16/*ALL*/, },
2441 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0xB4/*ALL*/, },
2966 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0xB4/*ALL*/, },
3495 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0x56/*ALL*/, },
4024 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0x56/*ALL*/, },
4549 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0xB4/*ALL*/, },
5074 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0xB4/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/include/
H A Dmdrv_dac_tbl.c340 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0x16/*ALL*/, },
850 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0x16/*ALL*/, },
1364 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0x16/*ALL*/, },
1874 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0x16/*ALL*/, },
2384 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0x56/*ALL*/, },
2894 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0x56/*ALL*/, },
3408 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0x56/*ALL*/, },
3922 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0x56/*ALL*/, },
4432 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0x40/*ALL*/, },
4942 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0x40/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6873 #define REG_TC_HDGEN_BK1_42_L _PK_L_(0x1, 0x42) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/include/
H A Dmdrv_dac_tbl.c340 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0x16/*ALL*/, },
850 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0x16/*ALL*/, },
1364 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0x16/*ALL*/, },
1874 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0x16/*ALL*/, },
2384 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0x56/*ALL*/, },
2894 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0x56/*ALL*/, },
3408 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0x56/*ALL*/, },
3922 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0x56/*ALL*/, },
4432 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0x40/*ALL*/, },
4942 { DRV_DAC_REG(REG_TC_HDGEN_BK1_42_L), 0xFF, 0x40/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6873 #define REG_TC_HDGEN_BK1_42_L _PK_L_(0x1, 0x42) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/pnl/
H A Dmdrv_dac_tbl.h3191 #define REG_TC_HDGEN_BK1_42_L _PK_L_(0x1, 0x42) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/pnl/
H A Dmdrv_dac_tbl.h3191 #define REG_TC_HDGEN_BK1_42_L _PK_L_(0x1, 0x42) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/pnl/
H A Dmdrv_dac_tbl.h3191 #define REG_TC_HDGEN_BK1_42_L _PK_L_(0x1, 0x42) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/pnl/
H A Dmdrv_dac_tbl.h3191 #define REG_TC_HDGEN_BK1_42_L _PK_L_(0x1, 0x42) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/pnl/
H A Dmdrv_dac_tbl.h3191 #define REG_TC_HDGEN_BK1_42_L _PK_L_(0x1, 0x42) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/pnl/
H A Dmdrv_dac_tbl.h3191 #define REG_TC_HDGEN_BK1_42_L _PK_L_(0x1, 0x42) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/pnl/
H A Dmdrv_dac_tbl.h3191 #define REG_TC_HDGEN_BK1_42_L _PK_L_(0x1, 0x42) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/pnl/
H A Dmdrv_dac_tbl.h3191 #define REG_TC_HDGEN_BK1_42_L _PK_L_(0x1, 0x42) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/pnl/
H A Dmdrv_dac_tbl.h3191 #define REG_TC_HDGEN_BK1_42_L _PK_L_(0x1, 0x42) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/pnl/
H A Dmdrv_dac_tbl.h3191 #define REG_TC_HDGEN_BK1_42_L _PK_L_(0x1, 0x42) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/pnl/
H A Dmdrv_dac_tbl.h3191 #define REG_TC_HDGEN_BK1_42_L _PK_L_(0x1, 0x42) macro