Home
last modified time | relevance | path

Searched refs:REG_TC_HDGEN_BK1_3E_H (Results 1 – 23 of 23) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/
H A Dhal_dac_tbl.c340 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
871 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
1406 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
1937 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
2468 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
2999 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
3534 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
4069 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
4600 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
5132 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/
H A Dhal_dac_tbl.c332 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
857 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
1386 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
1911 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
2436 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
2961 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
3490 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
4019 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
4544 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
5069 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/
H A Dhal_dac_tbl.c340 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
871 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
1406 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
1937 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
2468 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
2999 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
3534 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
4069 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
4600 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
5131 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/include/
H A Dmdrv_dac_tbl.c335 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
845 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
1359 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
1869 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
2379 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
2889 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
3403 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
3917 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
4427 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
4937 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6866 #define REG_TC_HDGEN_BK1_3E_H _PK_H_(0x1, 0x3E) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/include/
H A Dmdrv_dac_tbl.c335 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
845 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
1359 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
1869 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
2379 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
2889 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
3403 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
3917 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
4427 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
4937 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6866 #define REG_TC_HDGEN_BK1_3E_H _PK_H_(0x1, 0x3E) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/
H A Dhal_dac_tbl.c332 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
857 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
1386 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
1911 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
2436 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
2961 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
3490 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
4019 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
4544 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
5069 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/include/
H A Dmdrv_dac_tbl.c335 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
845 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
1359 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
1869 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
2379 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
2889 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
3403 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
3917 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
4427 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
4937 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6866 #define REG_TC_HDGEN_BK1_3E_H _PK_H_(0x1, 0x3E) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/include/
H A Dmdrv_dac_tbl.c335 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
845 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
1359 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
1869 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
2379 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
2889 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
3403 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
3917 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
4427 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
4937 { DRV_DAC_REG(REG_TC_HDGEN_BK1_3E_H), 0xFF, 0x00/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6866 #define REG_TC_HDGEN_BK1_3E_H _PK_H_(0x1, 0x3E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/pnl/
H A Dmdrv_dac_tbl.h3184 #define REG_TC_HDGEN_BK1_3E_H _PK_H_(0x1, 0x3E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/pnl/
H A Dmdrv_dac_tbl.h3184 #define REG_TC_HDGEN_BK1_3E_H _PK_H_(0x1, 0x3E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/pnl/
H A Dmdrv_dac_tbl.h3184 #define REG_TC_HDGEN_BK1_3E_H _PK_H_(0x1, 0x3E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/pnl/
H A Dmdrv_dac_tbl.h3184 #define REG_TC_HDGEN_BK1_3E_H _PK_H_(0x1, 0x3E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/pnl/
H A Dmdrv_dac_tbl.h3184 #define REG_TC_HDGEN_BK1_3E_H _PK_H_(0x1, 0x3E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/pnl/
H A Dmdrv_dac_tbl.h3184 #define REG_TC_HDGEN_BK1_3E_H _PK_H_(0x1, 0x3E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/pnl/
H A Dmdrv_dac_tbl.h3184 #define REG_TC_HDGEN_BK1_3E_H _PK_H_(0x1, 0x3E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/pnl/
H A Dmdrv_dac_tbl.h3184 #define REG_TC_HDGEN_BK1_3E_H _PK_H_(0x1, 0x3E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/pnl/
H A Dmdrv_dac_tbl.h3184 #define REG_TC_HDGEN_BK1_3E_H _PK_H_(0x1, 0x3E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/pnl/
H A Dmdrv_dac_tbl.h3184 #define REG_TC_HDGEN_BK1_3E_H _PK_H_(0x1, 0x3E) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/pnl/
H A Dmdrv_dac_tbl.h3184 #define REG_TC_HDGEN_BK1_3E_H _PK_H_(0x1, 0x3E) macro