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Searched refs:REG_TC_HDGEN_BK1_33_L (Results 1 – 23 of 23) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/
H A Dhal_dac_tbl.c313 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0x80/*ALL*/, },
844 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0x80/*ALL*/, },
1379 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0x80/*ALL*/, },
1910 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0x80/*ALL*/, },
2441 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0x80/*ALL*/, },
2972 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0x80/*ALL*/, },
3507 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0xa0/*ALL*/, },
4042 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0xa0/*ALL*/, },
4573 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0x80/*ALL*/, },
5105 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0x80/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/
H A Dhal_dac_tbl.c305 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0x80/*ALL*/, },
830 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0x80/*ALL*/, },
1359 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0x80/*ALL*/, },
1884 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0x80/*ALL*/, },
2409 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0x80/*ALL*/, },
2934 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0x80/*ALL*/, },
3463 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0xa0/*ALL*/, },
3992 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0xa0/*ALL*/, },
4517 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0x80/*ALL*/, },
5042 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0x80/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/
H A Dhal_dac_tbl.c313 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0x80/*ALL*/, },
844 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0x80/*ALL*/, },
1379 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0x80/*ALL*/, },
1910 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0x80/*ALL*/, },
2441 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0x80/*ALL*/, },
2972 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0x80/*ALL*/, },
3507 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0xa0/*ALL*/, },
4042 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0xa0/*ALL*/, },
4573 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0x80/*ALL*/, },
5104 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0x80/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/include/
H A Dmdrv_dac_tbl.c308 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0x80/*ALL*/, },
818 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0x80/*ALL*/, },
1332 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0x80/*ALL*/, },
1842 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0x80/*ALL*/, },
2352 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0x80/*ALL*/, },
2862 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0x80/*ALL*/, },
3376 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0xa0/*ALL*/, },
3890 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0xa0/*ALL*/, },
4400 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0x80/*ALL*/, },
4910 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0x80/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6843 #define REG_TC_HDGEN_BK1_33_L _PK_L_(0x1, 0x33) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/include/
H A Dmdrv_dac_tbl.c308 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0x80/*ALL*/, },
818 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0x80/*ALL*/, },
1332 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0x80/*ALL*/, },
1842 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0x80/*ALL*/, },
2352 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0x80/*ALL*/, },
2862 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0x80/*ALL*/, },
3376 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0xa0/*ALL*/, },
3890 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0xa0/*ALL*/, },
4400 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0x80/*ALL*/, },
4910 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0x80/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6843 #define REG_TC_HDGEN_BK1_33_L _PK_L_(0x1, 0x33) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/
H A Dhal_dac_tbl.c305 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0x80/*ALL*/, },
830 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0x80/*ALL*/, },
1359 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0x80/*ALL*/, },
1884 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0x80/*ALL*/, },
2409 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0x80/*ALL*/, },
2934 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0x80/*ALL*/, },
3463 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0xa0/*ALL*/, },
3992 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0xa0/*ALL*/, },
4517 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0x80/*ALL*/, },
5042 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0x80/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/include/
H A Dmdrv_dac_tbl.c308 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0x80/*ALL*/, },
818 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0x80/*ALL*/, },
1332 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0x80/*ALL*/, },
1842 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0x80/*ALL*/, },
2352 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0x80/*ALL*/, },
2862 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0x80/*ALL*/, },
3376 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0xa0/*ALL*/, },
3890 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0xa0/*ALL*/, },
4400 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0x80/*ALL*/, },
4910 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0x80/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6843 #define REG_TC_HDGEN_BK1_33_L _PK_L_(0x1, 0x33) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/include/
H A Dmdrv_dac_tbl.c308 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0x80/*ALL*/, },
818 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0x80/*ALL*/, },
1332 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0x80/*ALL*/, },
1842 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0x80/*ALL*/, },
2352 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0x80/*ALL*/, },
2862 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0x80/*ALL*/, },
3376 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0xa0/*ALL*/, },
3890 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0xa0/*ALL*/, },
4400 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0x80/*ALL*/, },
4910 { DRV_DAC_REG(REG_TC_HDGEN_BK1_33_L), 0xFF, 0x80/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6843 #define REG_TC_HDGEN_BK1_33_L _PK_L_(0x1, 0x33) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/pnl/
H A Dmdrv_dac_tbl.h3161 #define REG_TC_HDGEN_BK1_33_L _PK_L_(0x1, 0x33) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/pnl/
H A Dmdrv_dac_tbl.h3161 #define REG_TC_HDGEN_BK1_33_L _PK_L_(0x1, 0x33) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/pnl/
H A Dmdrv_dac_tbl.h3161 #define REG_TC_HDGEN_BK1_33_L _PK_L_(0x1, 0x33) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/pnl/
H A Dmdrv_dac_tbl.h3161 #define REG_TC_HDGEN_BK1_33_L _PK_L_(0x1, 0x33) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/pnl/
H A Dmdrv_dac_tbl.h3161 #define REG_TC_HDGEN_BK1_33_L _PK_L_(0x1, 0x33) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/pnl/
H A Dmdrv_dac_tbl.h3161 #define REG_TC_HDGEN_BK1_33_L _PK_L_(0x1, 0x33) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/pnl/
H A Dmdrv_dac_tbl.h3161 #define REG_TC_HDGEN_BK1_33_L _PK_L_(0x1, 0x33) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/pnl/
H A Dmdrv_dac_tbl.h3161 #define REG_TC_HDGEN_BK1_33_L _PK_L_(0x1, 0x33) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/pnl/
H A Dmdrv_dac_tbl.h3161 #define REG_TC_HDGEN_BK1_33_L _PK_L_(0x1, 0x33) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/pnl/
H A Dmdrv_dac_tbl.h3161 #define REG_TC_HDGEN_BK1_33_L _PK_L_(0x1, 0x33) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/pnl/
H A Dmdrv_dac_tbl.h3161 #define REG_TC_HDGEN_BK1_33_L _PK_L_(0x1, 0x33) macro