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Searched refs:REG_TC_HDGEN_BK1_31_L (Results 1 – 23 of 23) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/
H A Dhal_dac_tbl.c309 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
840 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
1375 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
1906 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
2437 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
2968 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
3503 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
4038 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
4569 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
5101 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/
H A Dhal_dac_tbl.c301 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
826 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
1355 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
1880 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
2405 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
2930 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
3459 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
3988 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
4513 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
5038 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/
H A Dhal_dac_tbl.c309 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
840 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
1375 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
1906 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
2437 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
2968 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
3503 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
4038 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
4569 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
5100 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/include/
H A Dmdrv_dac_tbl.c304 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
814 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
1328 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
1838 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
2348 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
2858 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
3372 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
3886 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
4396 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
4906 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6839 #define REG_TC_HDGEN_BK1_31_L _PK_L_(0x1, 0x31) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/include/
H A Dmdrv_dac_tbl.c304 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
814 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
1328 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
1838 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
2348 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
2858 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
3372 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
3886 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
4396 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
4906 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6839 #define REG_TC_HDGEN_BK1_31_L _PK_L_(0x1, 0x31) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/
H A Dhal_dac_tbl.c301 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
826 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
1355 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
1880 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
2405 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
2930 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
3459 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
3988 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
4513 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
5038 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/include/
H A Dmdrv_dac_tbl.c304 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
814 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
1328 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
1838 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
2348 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
2858 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
3372 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
3886 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
4396 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
4906 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6839 #define REG_TC_HDGEN_BK1_31_L _PK_L_(0x1, 0x31) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/include/
H A Dmdrv_dac_tbl.c304 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
814 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
1328 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
1838 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
2348 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
2858 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
3372 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
3886 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
4396 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
4906 { DRV_DAC_REG(REG_TC_HDGEN_BK1_31_L), 0xFF, 0x91/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6839 #define REG_TC_HDGEN_BK1_31_L _PK_L_(0x1, 0x31) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/pnl/
H A Dmdrv_dac_tbl.h3157 #define REG_TC_HDGEN_BK1_31_L _PK_L_(0x1, 0x31) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/pnl/
H A Dmdrv_dac_tbl.h3157 #define REG_TC_HDGEN_BK1_31_L _PK_L_(0x1, 0x31) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/pnl/
H A Dmdrv_dac_tbl.h3157 #define REG_TC_HDGEN_BK1_31_L _PK_L_(0x1, 0x31) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/pnl/
H A Dmdrv_dac_tbl.h3157 #define REG_TC_HDGEN_BK1_31_L _PK_L_(0x1, 0x31) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/pnl/
H A Dmdrv_dac_tbl.h3157 #define REG_TC_HDGEN_BK1_31_L _PK_L_(0x1, 0x31) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/pnl/
H A Dmdrv_dac_tbl.h3157 #define REG_TC_HDGEN_BK1_31_L _PK_L_(0x1, 0x31) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/pnl/
H A Dmdrv_dac_tbl.h3157 #define REG_TC_HDGEN_BK1_31_L _PK_L_(0x1, 0x31) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/pnl/
H A Dmdrv_dac_tbl.h3157 #define REG_TC_HDGEN_BK1_31_L _PK_L_(0x1, 0x31) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/pnl/
H A Dmdrv_dac_tbl.h3157 #define REG_TC_HDGEN_BK1_31_L _PK_L_(0x1, 0x31) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/pnl/
H A Dmdrv_dac_tbl.h3157 #define REG_TC_HDGEN_BK1_31_L _PK_L_(0x1, 0x31) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/pnl/
H A Dmdrv_dac_tbl.h3157 #define REG_TC_HDGEN_BK1_31_L _PK_L_(0x1, 0x31) macro