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Searched refs:REG_TC_HDGEN_BK1_2D_L (Results 1 – 23 of 23) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/
H A Dhal_dac_tbl.c301 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
832 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
1367 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
1898 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
2429 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
2960 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
3495 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
4030 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
4561 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
5093 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/
H A Dhal_dac_tbl.c293 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
818 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
1347 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
1872 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
2397 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
2922 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
3451 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
3980 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
4505 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
5030 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/
H A Dhal_dac_tbl.c301 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
832 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
1367 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
1898 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
2429 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
2960 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
3495 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
4030 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
4561 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
5092 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/include/
H A Dmdrv_dac_tbl.c296 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
806 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
1320 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
1830 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
2340 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
2850 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
3364 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
3878 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
4388 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
4898 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6831 #define REG_TC_HDGEN_BK1_2D_L _PK_L_(0x1, 0x2D) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/include/
H A Dmdrv_dac_tbl.c296 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
806 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
1320 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
1830 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
2340 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
2850 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
3364 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
3878 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
4388 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
4898 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6831 #define REG_TC_HDGEN_BK1_2D_L _PK_L_(0x1, 0x2D) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/
H A Dhal_dac_tbl.c293 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
818 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
1347 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
1872 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
2397 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
2922 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
3451 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
3980 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
4505 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
5030 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/include/
H A Dmdrv_dac_tbl.c296 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
806 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
1320 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
1830 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
2340 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
2850 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
3364 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
3878 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
4388 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
4898 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6831 #define REG_TC_HDGEN_BK1_2D_L _PK_L_(0x1, 0x2D) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/include/
H A Dmdrv_dac_tbl.c296 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
806 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
1320 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
1830 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
2340 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
2850 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
3364 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
3878 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
4388 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
4898 { DRV_DAC_REG(REG_TC_HDGEN_BK1_2D_L), 0xFF, 0x00/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6831 #define REG_TC_HDGEN_BK1_2D_L _PK_L_(0x1, 0x2D) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/pnl/
H A Dmdrv_dac_tbl.h3149 #define REG_TC_HDGEN_BK1_2D_L _PK_L_(0x1, 0x2D) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/pnl/
H A Dmdrv_dac_tbl.h3149 #define REG_TC_HDGEN_BK1_2D_L _PK_L_(0x1, 0x2D) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/pnl/
H A Dmdrv_dac_tbl.h3149 #define REG_TC_HDGEN_BK1_2D_L _PK_L_(0x1, 0x2D) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/pnl/
H A Dmdrv_dac_tbl.h3149 #define REG_TC_HDGEN_BK1_2D_L _PK_L_(0x1, 0x2D) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/pnl/
H A Dmdrv_dac_tbl.h3149 #define REG_TC_HDGEN_BK1_2D_L _PK_L_(0x1, 0x2D) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/pnl/
H A Dmdrv_dac_tbl.h3149 #define REG_TC_HDGEN_BK1_2D_L _PK_L_(0x1, 0x2D) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/pnl/
H A Dmdrv_dac_tbl.h3149 #define REG_TC_HDGEN_BK1_2D_L _PK_L_(0x1, 0x2D) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/pnl/
H A Dmdrv_dac_tbl.h3149 #define REG_TC_HDGEN_BK1_2D_L _PK_L_(0x1, 0x2D) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/pnl/
H A Dmdrv_dac_tbl.h3149 #define REG_TC_HDGEN_BK1_2D_L _PK_L_(0x1, 0x2D) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/pnl/
H A Dmdrv_dac_tbl.h3149 #define REG_TC_HDGEN_BK1_2D_L _PK_L_(0x1, 0x2D) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/pnl/
H A Dmdrv_dac_tbl.h3149 #define REG_TC_HDGEN_BK1_2D_L _PK_L_(0x1, 0x2D) macro