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Searched refs:REG_TC_HDGEN_BK1_28_L (Results 1 – 23 of 23) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/
H A Dhal_dac_tbl.c291 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
822 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
1357 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
1888 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
2419 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
2950 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
3485 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
4020 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
4551 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
5083 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/
H A Dhal_dac_tbl.c283 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
808 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
1337 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
1862 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
2387 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
2912 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
3441 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
3970 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
4495 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
5020 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/
H A Dhal_dac_tbl.c291 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
822 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
1357 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
1888 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
2419 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
2950 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
3485 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
4020 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
4551 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
5082 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/include/
H A Dmdrv_dac_tbl.c286 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
796 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
1310 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
1820 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
2330 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
2840 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
3354 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
3868 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
4378 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
4888 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6821 #define REG_TC_HDGEN_BK1_28_L _PK_L_(0x1, 0x28) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/include/
H A Dmdrv_dac_tbl.c286 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
796 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
1310 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
1820 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
2330 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
2840 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
3354 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
3868 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
4378 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
4888 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6821 #define REG_TC_HDGEN_BK1_28_L _PK_L_(0x1, 0x28) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/
H A Dhal_dac_tbl.c283 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
808 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
1337 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
1862 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
2387 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
2912 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
3441 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
3970 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
4495 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
5020 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/include/
H A Dmdrv_dac_tbl.c286 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
796 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
1310 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
1820 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
2330 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
2840 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
3354 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
3868 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
4378 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
4888 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6821 #define REG_TC_HDGEN_BK1_28_L _PK_L_(0x1, 0x28) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/include/
H A Dmdrv_dac_tbl.c286 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
796 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
1310 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
1820 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
2330 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
2840 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
3354 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
3868 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
4378 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
4888 { DRV_DAC_REG(REG_TC_HDGEN_BK1_28_L), 0xFF, 0x6e/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6821 #define REG_TC_HDGEN_BK1_28_L _PK_L_(0x1, 0x28) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/pnl/
H A Dmdrv_dac_tbl.h3139 #define REG_TC_HDGEN_BK1_28_L _PK_L_(0x1, 0x28) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/pnl/
H A Dmdrv_dac_tbl.h3139 #define REG_TC_HDGEN_BK1_28_L _PK_L_(0x1, 0x28) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/pnl/
H A Dmdrv_dac_tbl.h3139 #define REG_TC_HDGEN_BK1_28_L _PK_L_(0x1, 0x28) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/pnl/
H A Dmdrv_dac_tbl.h3139 #define REG_TC_HDGEN_BK1_28_L _PK_L_(0x1, 0x28) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/pnl/
H A Dmdrv_dac_tbl.h3139 #define REG_TC_HDGEN_BK1_28_L _PK_L_(0x1, 0x28) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/pnl/
H A Dmdrv_dac_tbl.h3139 #define REG_TC_HDGEN_BK1_28_L _PK_L_(0x1, 0x28) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/pnl/
H A Dmdrv_dac_tbl.h3139 #define REG_TC_HDGEN_BK1_28_L _PK_L_(0x1, 0x28) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/pnl/
H A Dmdrv_dac_tbl.h3139 #define REG_TC_HDGEN_BK1_28_L _PK_L_(0x1, 0x28) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/pnl/
H A Dmdrv_dac_tbl.h3139 #define REG_TC_HDGEN_BK1_28_L _PK_L_(0x1, 0x28) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/pnl/
H A Dmdrv_dac_tbl.h3139 #define REG_TC_HDGEN_BK1_28_L _PK_L_(0x1, 0x28) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/pnl/
H A Dmdrv_dac_tbl.h3139 #define REG_TC_HDGEN_BK1_28_L _PK_L_(0x1, 0x28) macro