Home
last modified time | relevance | path

Searched refs:REG_TC_HDGEN_BK1_27_H (Results 1 – 23 of 23) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/
H A Dhal_dac_tbl.c290 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
821 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
1356 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
1887 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
2418 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
2949 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
3484 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
4019 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
4550 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
5082 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/
H A Dhal_dac_tbl.c282 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
807 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
1336 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
1861 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
2386 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
2911 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
3440 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
3969 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
4494 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
5019 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/
H A Dhal_dac_tbl.c290 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
821 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
1356 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
1887 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
2418 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
2949 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
3484 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
4019 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
4550 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
5081 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/include/
H A Dmdrv_dac_tbl.c285 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
795 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
1309 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
1819 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
2329 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
2839 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
3353 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
3867 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
4377 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
4887 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6820 #define REG_TC_HDGEN_BK1_27_H _PK_H_(0x1, 0x27) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/include/
H A Dmdrv_dac_tbl.c285 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
795 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
1309 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
1819 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
2329 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
2839 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
3353 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
3867 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
4377 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
4887 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6820 #define REG_TC_HDGEN_BK1_27_H _PK_H_(0x1, 0x27) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/
H A Dhal_dac_tbl.c282 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
807 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
1336 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
1861 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
2386 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
2911 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
3440 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
3969 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
4494 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
5019 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/include/
H A Dmdrv_dac_tbl.c285 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
795 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
1309 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
1819 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
2329 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
2839 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
3353 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
3867 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
4377 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
4887 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6820 #define REG_TC_HDGEN_BK1_27_H _PK_H_(0x1, 0x27) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/include/
H A Dmdrv_dac_tbl.c285 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
795 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
1309 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
1819 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
2329 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
2839 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
3353 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
3867 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
4377 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
4887 { DRV_DAC_REG(REG_TC_HDGEN_BK1_27_H), 0xFF, 0x00/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6820 #define REG_TC_HDGEN_BK1_27_H _PK_H_(0x1, 0x27) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/pnl/
H A Dmdrv_dac_tbl.h3138 #define REG_TC_HDGEN_BK1_27_H _PK_H_(0x1, 0x27) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/pnl/
H A Dmdrv_dac_tbl.h3138 #define REG_TC_HDGEN_BK1_27_H _PK_H_(0x1, 0x27) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/pnl/
H A Dmdrv_dac_tbl.h3138 #define REG_TC_HDGEN_BK1_27_H _PK_H_(0x1, 0x27) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/pnl/
H A Dmdrv_dac_tbl.h3138 #define REG_TC_HDGEN_BK1_27_H _PK_H_(0x1, 0x27) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/pnl/
H A Dmdrv_dac_tbl.h3138 #define REG_TC_HDGEN_BK1_27_H _PK_H_(0x1, 0x27) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/pnl/
H A Dmdrv_dac_tbl.h3138 #define REG_TC_HDGEN_BK1_27_H _PK_H_(0x1, 0x27) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/pnl/
H A Dmdrv_dac_tbl.h3138 #define REG_TC_HDGEN_BK1_27_H _PK_H_(0x1, 0x27) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/pnl/
H A Dmdrv_dac_tbl.h3138 #define REG_TC_HDGEN_BK1_27_H _PK_H_(0x1, 0x27) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/pnl/
H A Dmdrv_dac_tbl.h3138 #define REG_TC_HDGEN_BK1_27_H _PK_H_(0x1, 0x27) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/pnl/
H A Dmdrv_dac_tbl.h3138 #define REG_TC_HDGEN_BK1_27_H _PK_H_(0x1, 0x27) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/pnl/
H A Dmdrv_dac_tbl.h3138 #define REG_TC_HDGEN_BK1_27_H _PK_H_(0x1, 0x27) macro