Home
last modified time | relevance | path

Searched refs:REG_TC_HDGEN_BK1_25_H (Results 1 – 23 of 23) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/
H A Dhal_dac_tbl.c286 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
817 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
1352 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
1883 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
2414 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
2945 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
3480 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
4015 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
4546 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
5078 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/
H A Dhal_dac_tbl.c278 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
803 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
1332 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
1857 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
2382 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
2907 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
3436 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
3965 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
4490 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
5015 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/
H A Dhal_dac_tbl.c286 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
817 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
1352 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
1883 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
2414 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
2945 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
3480 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
4015 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
4546 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
5077 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/include/
H A Dmdrv_dac_tbl.c281 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
791 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
1305 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
1815 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
2325 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
2835 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
3349 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
3863 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
4373 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
4883 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6816 #define REG_TC_HDGEN_BK1_25_H _PK_H_(0x1, 0x25) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/include/
H A Dmdrv_dac_tbl.c281 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
791 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
1305 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
1815 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
2325 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
2835 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
3349 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
3863 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
4373 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
4883 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6816 #define REG_TC_HDGEN_BK1_25_H _PK_H_(0x1, 0x25) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/
H A Dhal_dac_tbl.c278 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
803 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
1332 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
1857 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
2382 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
2907 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
3436 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
3965 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
4490 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
5015 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/include/
H A Dmdrv_dac_tbl.c281 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
791 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
1305 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
1815 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
2325 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
2835 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
3349 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
3863 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
4373 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
4883 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6816 #define REG_TC_HDGEN_BK1_25_H _PK_H_(0x1, 0x25) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/include/
H A Dmdrv_dac_tbl.c281 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
791 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
1305 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
1815 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
2325 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
2835 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
3349 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
3863 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
4373 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
4883 { DRV_DAC_REG(REG_TC_HDGEN_BK1_25_H), 0xFF, 0x00/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6816 #define REG_TC_HDGEN_BK1_25_H _PK_H_(0x1, 0x25) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/pnl/
H A Dmdrv_dac_tbl.h3134 #define REG_TC_HDGEN_BK1_25_H _PK_H_(0x1, 0x25) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/pnl/
H A Dmdrv_dac_tbl.h3134 #define REG_TC_HDGEN_BK1_25_H _PK_H_(0x1, 0x25) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/pnl/
H A Dmdrv_dac_tbl.h3134 #define REG_TC_HDGEN_BK1_25_H _PK_H_(0x1, 0x25) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/pnl/
H A Dmdrv_dac_tbl.h3134 #define REG_TC_HDGEN_BK1_25_H _PK_H_(0x1, 0x25) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/pnl/
H A Dmdrv_dac_tbl.h3134 #define REG_TC_HDGEN_BK1_25_H _PK_H_(0x1, 0x25) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/pnl/
H A Dmdrv_dac_tbl.h3134 #define REG_TC_HDGEN_BK1_25_H _PK_H_(0x1, 0x25) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/pnl/
H A Dmdrv_dac_tbl.h3134 #define REG_TC_HDGEN_BK1_25_H _PK_H_(0x1, 0x25) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/pnl/
H A Dmdrv_dac_tbl.h3134 #define REG_TC_HDGEN_BK1_25_H _PK_H_(0x1, 0x25) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/pnl/
H A Dmdrv_dac_tbl.h3134 #define REG_TC_HDGEN_BK1_25_H _PK_H_(0x1, 0x25) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/pnl/
H A Dmdrv_dac_tbl.h3134 #define REG_TC_HDGEN_BK1_25_H _PK_H_(0x1, 0x25) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/pnl/
H A Dmdrv_dac_tbl.h3134 #define REG_TC_HDGEN_BK1_25_H _PK_H_(0x1, 0x25) macro