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Searched refs:REG_TC_HDGEN_BK1_24_L (Results 1 – 23 of 23) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/
H A Dhal_dac_tbl.c283 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x00/*ALL*/, },
814 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x00/*ALL*/, },
1349 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x00/*ALL*/, },
1880 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x00/*ALL*/, },
2411 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x27/*ALL*/, },
2942 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x27/*ALL*/, },
3477 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x2b/*ALL*/, },
4012 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x2b/*ALL*/, },
4543 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x2b/*ALL*/, },
5075 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x2b/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/
H A Dhal_dac_tbl.c275 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x00/*ALL*/, },
800 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x00/*ALL*/, },
1329 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x00/*ALL*/, },
1854 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x00/*ALL*/, },
2379 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x27/*ALL*/, },
2904 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x27/*ALL*/, },
3433 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x2b/*ALL*/, },
3962 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x2b/*ALL*/, },
4487 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x2b/*ALL*/, },
5012 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x2b/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/
H A Dhal_dac_tbl.c283 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x00/*ALL*/, },
814 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x00/*ALL*/, },
1349 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x00/*ALL*/, },
1880 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x00/*ALL*/, },
2411 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x27/*ALL*/, },
2942 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x27/*ALL*/, },
3477 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x2b/*ALL*/, },
4012 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x2b/*ALL*/, },
4543 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x2b/*ALL*/, },
5074 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x2b/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/include/
H A Dmdrv_dac_tbl.c278 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x00/*ALL*/, },
788 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x00/*ALL*/, },
1302 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x00/*ALL*/, },
1812 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x00/*ALL*/, },
2322 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x27/*ALL*/, },
2832 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x27/*ALL*/, },
3346 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x2b/*ALL*/, },
3860 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x2b/*ALL*/, },
4370 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x2b/*ALL*/, },
4880 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x2b/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6813 #define REG_TC_HDGEN_BK1_24_L _PK_L_(0x1, 0x24) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/include/
H A Dmdrv_dac_tbl.c278 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x00/*ALL*/, },
788 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x00/*ALL*/, },
1302 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x00/*ALL*/, },
1812 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x00/*ALL*/, },
2322 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x27/*ALL*/, },
2832 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x27/*ALL*/, },
3346 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x2b/*ALL*/, },
3860 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x2b/*ALL*/, },
4370 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x2b/*ALL*/, },
4880 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x2b/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6813 #define REG_TC_HDGEN_BK1_24_L _PK_L_(0x1, 0x24) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/
H A Dhal_dac_tbl.c275 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x00/*ALL*/, },
800 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x00/*ALL*/, },
1329 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x00/*ALL*/, },
1854 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x00/*ALL*/, },
2379 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x27/*ALL*/, },
2904 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x27/*ALL*/, },
3433 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x2b/*ALL*/, },
3962 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x2b/*ALL*/, },
4487 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x2b/*ALL*/, },
5012 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x2b/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/include/
H A Dmdrv_dac_tbl.c278 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x00/*ALL*/, },
788 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x00/*ALL*/, },
1302 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x00/*ALL*/, },
1812 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x00/*ALL*/, },
2322 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x27/*ALL*/, },
2832 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x27/*ALL*/, },
3346 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x2b/*ALL*/, },
3860 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x2b/*ALL*/, },
4370 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x2b/*ALL*/, },
4880 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x2b/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6813 #define REG_TC_HDGEN_BK1_24_L _PK_L_(0x1, 0x24) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/include/
H A Dmdrv_dac_tbl.c278 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x00/*ALL*/, },
788 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x00/*ALL*/, },
1302 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x00/*ALL*/, },
1812 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x00/*ALL*/, },
2322 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x27/*ALL*/, },
2832 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x27/*ALL*/, },
3346 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x2b/*ALL*/, },
3860 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x2b/*ALL*/, },
4370 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x2b/*ALL*/, },
4880 { DRV_DAC_REG(REG_TC_HDGEN_BK1_24_L), 0xFF, 0x2b/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6813 #define REG_TC_HDGEN_BK1_24_L _PK_L_(0x1, 0x24) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/pnl/
H A Dmdrv_dac_tbl.h3131 #define REG_TC_HDGEN_BK1_24_L _PK_L_(0x1, 0x24) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/pnl/
H A Dmdrv_dac_tbl.h3131 #define REG_TC_HDGEN_BK1_24_L _PK_L_(0x1, 0x24) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/pnl/
H A Dmdrv_dac_tbl.h3131 #define REG_TC_HDGEN_BK1_24_L _PK_L_(0x1, 0x24) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/pnl/
H A Dmdrv_dac_tbl.h3131 #define REG_TC_HDGEN_BK1_24_L _PK_L_(0x1, 0x24) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/pnl/
H A Dmdrv_dac_tbl.h3131 #define REG_TC_HDGEN_BK1_24_L _PK_L_(0x1, 0x24) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/pnl/
H A Dmdrv_dac_tbl.h3131 #define REG_TC_HDGEN_BK1_24_L _PK_L_(0x1, 0x24) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/pnl/
H A Dmdrv_dac_tbl.h3131 #define REG_TC_HDGEN_BK1_24_L _PK_L_(0x1, 0x24) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/pnl/
H A Dmdrv_dac_tbl.h3131 #define REG_TC_HDGEN_BK1_24_L _PK_L_(0x1, 0x24) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/pnl/
H A Dmdrv_dac_tbl.h3131 #define REG_TC_HDGEN_BK1_24_L _PK_L_(0x1, 0x24) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/pnl/
H A Dmdrv_dac_tbl.h3131 #define REG_TC_HDGEN_BK1_24_L _PK_L_(0x1, 0x24) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/pnl/
H A Dmdrv_dac_tbl.h3131 #define REG_TC_HDGEN_BK1_24_L _PK_L_(0x1, 0x24) macro