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Searched refs:REG_TC_HDGEN_BK1_21_L (Results 1 – 23 of 23) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/
H A Dhal_dac_tbl.c277 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0x03/*ALL*/, },
808 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0x0a/*ALL*/, },
1343 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0x69/*ALL*/, },
1874 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0x70/*ALL*/, },
2405 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0xec/*ALL*/, },
2936 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0xec/*ALL*/, },
3471 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0x63/*ALL*/, },
4006 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0x63/*ALL*/, },
4537 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0x63/*ALL*/, },
5069 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0x63/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/
H A Dhal_dac_tbl.c269 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0x03/*ALL*/, },
794 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0x0a/*ALL*/, },
1323 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0x69/*ALL*/, },
1848 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0x70/*ALL*/, },
2373 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0xec/*ALL*/, },
2898 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0xec/*ALL*/, },
3427 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0x63/*ALL*/, },
3956 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0x63/*ALL*/, },
4481 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0x63/*ALL*/, },
5006 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0x63/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/
H A Dhal_dac_tbl.c277 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0x03/*ALL*/, },
808 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0x0a/*ALL*/, },
1343 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0x69/*ALL*/, },
1874 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0x70/*ALL*/, },
2405 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0xec/*ALL*/, },
2936 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0xec/*ALL*/, },
3471 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0x63/*ALL*/, },
4006 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0x63/*ALL*/, },
4537 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0x63/*ALL*/, },
5068 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0x63/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/include/
H A Dmdrv_dac_tbl.c272 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0x03/*ALL*/, },
782 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0x0a/*ALL*/, },
1296 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0x69/*ALL*/, },
1806 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0x70/*ALL*/, },
2316 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0xec/*ALL*/, },
2826 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0xec/*ALL*/, },
3340 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0x63/*ALL*/, },
3854 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0x63/*ALL*/, },
4364 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0x63/*ALL*/, },
4874 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0x63/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6807 #define REG_TC_HDGEN_BK1_21_L _PK_L_(0x1, 0x21) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/include/
H A Dmdrv_dac_tbl.c272 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0x03/*ALL*/, },
782 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0x0a/*ALL*/, },
1296 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0x69/*ALL*/, },
1806 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0x70/*ALL*/, },
2316 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0xec/*ALL*/, },
2826 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0xec/*ALL*/, },
3340 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0x63/*ALL*/, },
3854 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0x63/*ALL*/, },
4364 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0x63/*ALL*/, },
4874 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0x63/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6807 #define REG_TC_HDGEN_BK1_21_L _PK_L_(0x1, 0x21) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/
H A Dhal_dac_tbl.c269 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0x03/*ALL*/, },
794 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0x0a/*ALL*/, },
1323 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0x69/*ALL*/, },
1848 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0x70/*ALL*/, },
2373 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0xec/*ALL*/, },
2898 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0xec/*ALL*/, },
3427 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0x63/*ALL*/, },
3956 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0x63/*ALL*/, },
4481 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0x63/*ALL*/, },
5006 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0x63/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/include/
H A Dmdrv_dac_tbl.c272 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0x03/*ALL*/, },
782 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0x0a/*ALL*/, },
1296 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0x69/*ALL*/, },
1806 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0x70/*ALL*/, },
2316 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0xec/*ALL*/, },
2826 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0xec/*ALL*/, },
3340 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0x63/*ALL*/, },
3854 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0x63/*ALL*/, },
4364 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0x63/*ALL*/, },
4874 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0x63/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6807 #define REG_TC_HDGEN_BK1_21_L _PK_L_(0x1, 0x21) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/include/
H A Dmdrv_dac_tbl.c272 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0x03/*ALL*/, },
782 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0x0a/*ALL*/, },
1296 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0x69/*ALL*/, },
1806 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0x70/*ALL*/, },
2316 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0xec/*ALL*/, },
2826 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0xec/*ALL*/, },
3340 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0x63/*ALL*/, },
3854 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0x63/*ALL*/, },
4364 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0x63/*ALL*/, },
4874 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_L), 0xFF, 0x63/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6807 #define REG_TC_HDGEN_BK1_21_L _PK_L_(0x1, 0x21) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/pnl/
H A Dmdrv_dac_tbl.h3125 #define REG_TC_HDGEN_BK1_21_L _PK_L_(0x1, 0x21) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/pnl/
H A Dmdrv_dac_tbl.h3125 #define REG_TC_HDGEN_BK1_21_L _PK_L_(0x1, 0x21) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/pnl/
H A Dmdrv_dac_tbl.h3125 #define REG_TC_HDGEN_BK1_21_L _PK_L_(0x1, 0x21) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/pnl/
H A Dmdrv_dac_tbl.h3125 #define REG_TC_HDGEN_BK1_21_L _PK_L_(0x1, 0x21) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/pnl/
H A Dmdrv_dac_tbl.h3125 #define REG_TC_HDGEN_BK1_21_L _PK_L_(0x1, 0x21) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/pnl/
H A Dmdrv_dac_tbl.h3125 #define REG_TC_HDGEN_BK1_21_L _PK_L_(0x1, 0x21) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/pnl/
H A Dmdrv_dac_tbl.h3125 #define REG_TC_HDGEN_BK1_21_L _PK_L_(0x1, 0x21) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/pnl/
H A Dmdrv_dac_tbl.h3125 #define REG_TC_HDGEN_BK1_21_L _PK_L_(0x1, 0x21) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/pnl/
H A Dmdrv_dac_tbl.h3125 #define REG_TC_HDGEN_BK1_21_L _PK_L_(0x1, 0x21) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/pnl/
H A Dmdrv_dac_tbl.h3125 #define REG_TC_HDGEN_BK1_21_L _PK_L_(0x1, 0x21) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/pnl/
H A Dmdrv_dac_tbl.h3125 #define REG_TC_HDGEN_BK1_21_L _PK_L_(0x1, 0x21) macro