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Searched refs:REG_TC_HDGEN_BK1_21_H (Results 1 – 23 of 23) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/
H A Dhal_dac_tbl.c278 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x02/*ALL*/, },
809 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x02/*ALL*/, },
1344 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x02/*ALL*/, },
1875 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x02/*ALL*/, },
2406 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x02/*ALL*/, },
2937 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x02/*ALL*/, },
3472 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x04/*ALL*/, },
4007 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x04/*ALL*/, },
4538 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x04/*ALL*/, },
5070 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x04/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/
H A Dhal_dac_tbl.c270 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x02/*ALL*/, },
795 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x02/*ALL*/, },
1324 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x02/*ALL*/, },
1849 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x02/*ALL*/, },
2374 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x02/*ALL*/, },
2899 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x02/*ALL*/, },
3428 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x04/*ALL*/, },
3957 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x04/*ALL*/, },
4482 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x04/*ALL*/, },
5007 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x04/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/
H A Dhal_dac_tbl.c278 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x02/*ALL*/, },
809 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x02/*ALL*/, },
1344 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x02/*ALL*/, },
1875 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x02/*ALL*/, },
2406 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x02/*ALL*/, },
2937 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x02/*ALL*/, },
3472 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x04/*ALL*/, },
4007 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x04/*ALL*/, },
4538 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x04/*ALL*/, },
5069 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x04/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/include/
H A Dmdrv_dac_tbl.c273 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x02/*ALL*/, },
783 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x02/*ALL*/, },
1297 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x02/*ALL*/, },
1807 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x02/*ALL*/, },
2317 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x02/*ALL*/, },
2827 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x02/*ALL*/, },
3341 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x04/*ALL*/, },
3855 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x04/*ALL*/, },
4365 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x04/*ALL*/, },
4875 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x04/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6808 #define REG_TC_HDGEN_BK1_21_H _PK_H_(0x1, 0x21) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/include/
H A Dmdrv_dac_tbl.c273 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x02/*ALL*/, },
783 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x02/*ALL*/, },
1297 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x02/*ALL*/, },
1807 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x02/*ALL*/, },
2317 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x02/*ALL*/, },
2827 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x02/*ALL*/, },
3341 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x04/*ALL*/, },
3855 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x04/*ALL*/, },
4365 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x04/*ALL*/, },
4875 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x04/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6808 #define REG_TC_HDGEN_BK1_21_H _PK_H_(0x1, 0x21) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/
H A Dhal_dac_tbl.c270 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x02/*ALL*/, },
795 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x02/*ALL*/, },
1324 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x02/*ALL*/, },
1849 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x02/*ALL*/, },
2374 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x02/*ALL*/, },
2899 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x02/*ALL*/, },
3428 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x04/*ALL*/, },
3957 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x04/*ALL*/, },
4482 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x04/*ALL*/, },
5007 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x04/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/include/
H A Dmdrv_dac_tbl.c273 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x02/*ALL*/, },
783 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x02/*ALL*/, },
1297 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x02/*ALL*/, },
1807 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x02/*ALL*/, },
2317 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x02/*ALL*/, },
2827 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x02/*ALL*/, },
3341 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x04/*ALL*/, },
3855 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x04/*ALL*/, },
4365 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x04/*ALL*/, },
4875 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x04/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6808 #define REG_TC_HDGEN_BK1_21_H _PK_H_(0x1, 0x21) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/include/
H A Dmdrv_dac_tbl.c273 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x02/*ALL*/, },
783 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x02/*ALL*/, },
1297 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x02/*ALL*/, },
1807 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x02/*ALL*/, },
2317 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x02/*ALL*/, },
2827 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x02/*ALL*/, },
3341 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x04/*ALL*/, },
3855 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x04/*ALL*/, },
4365 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x04/*ALL*/, },
4875 { DRV_DAC_REG(REG_TC_HDGEN_BK1_21_H), 0xFF, 0x04/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6808 #define REG_TC_HDGEN_BK1_21_H _PK_H_(0x1, 0x21) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/pnl/
H A Dmdrv_dac_tbl.h3126 #define REG_TC_HDGEN_BK1_21_H _PK_H_(0x1, 0x21) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/pnl/
H A Dmdrv_dac_tbl.h3126 #define REG_TC_HDGEN_BK1_21_H _PK_H_(0x1, 0x21) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/pnl/
H A Dmdrv_dac_tbl.h3126 #define REG_TC_HDGEN_BK1_21_H _PK_H_(0x1, 0x21) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/pnl/
H A Dmdrv_dac_tbl.h3126 #define REG_TC_HDGEN_BK1_21_H _PK_H_(0x1, 0x21) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/pnl/
H A Dmdrv_dac_tbl.h3126 #define REG_TC_HDGEN_BK1_21_H _PK_H_(0x1, 0x21) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/pnl/
H A Dmdrv_dac_tbl.h3126 #define REG_TC_HDGEN_BK1_21_H _PK_H_(0x1, 0x21) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/pnl/
H A Dmdrv_dac_tbl.h3126 #define REG_TC_HDGEN_BK1_21_H _PK_H_(0x1, 0x21) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/pnl/
H A Dmdrv_dac_tbl.h3126 #define REG_TC_HDGEN_BK1_21_H _PK_H_(0x1, 0x21) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/pnl/
H A Dmdrv_dac_tbl.h3126 #define REG_TC_HDGEN_BK1_21_H _PK_H_(0x1, 0x21) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/pnl/
H A Dmdrv_dac_tbl.h3126 #define REG_TC_HDGEN_BK1_21_H _PK_H_(0x1, 0x21) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/pnl/
H A Dmdrv_dac_tbl.h3126 #define REG_TC_HDGEN_BK1_21_H _PK_H_(0x1, 0x21) macro