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Searched refs:REG_TC_HDGEN_BK1_1C_L (Results 1 – 23 of 23) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/
H A Dhal_dac_tbl.c267 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0x00/*ALL*/, },
798 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0x00/*ALL*/, },
1333 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0x00/*ALL*/, },
1864 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0x00/*ALL*/, },
2395 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0x00/*ALL*/, },
2926 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0x00/*ALL*/, },
3461 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0xaf/*ALL*/, },
3996 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0xaf/*ALL*/, },
4527 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0x00/*ALL*/, },
5059 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/
H A Dhal_dac_tbl.c259 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0x00/*ALL*/, },
784 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0x00/*ALL*/, },
1313 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0x00/*ALL*/, },
1838 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0x00/*ALL*/, },
2363 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0x00/*ALL*/, },
2888 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0x00/*ALL*/, },
3417 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0xaf/*ALL*/, },
3946 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0xaf/*ALL*/, },
4471 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0x00/*ALL*/, },
4996 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/
H A Dhal_dac_tbl.c267 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0x00/*ALL*/, },
798 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0x00/*ALL*/, },
1333 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0x00/*ALL*/, },
1864 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0x00/*ALL*/, },
2395 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0x00/*ALL*/, },
2926 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0x00/*ALL*/, },
3461 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0xaf/*ALL*/, },
3996 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0xaf/*ALL*/, },
4527 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0x00/*ALL*/, },
5058 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/include/
H A Dmdrv_dac_tbl.c262 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0x00/*ALL*/, },
772 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0x00/*ALL*/, },
1286 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0x00/*ALL*/, },
1796 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0x00/*ALL*/, },
2306 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0x00/*ALL*/, },
2816 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0x00/*ALL*/, },
3330 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0xaf/*ALL*/, },
3844 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0xaf/*ALL*/, },
4354 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0x00/*ALL*/, },
4864 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0x00/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6797 #define REG_TC_HDGEN_BK1_1C_L _PK_L_(0x1, 0x1C) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/include/
H A Dmdrv_dac_tbl.c262 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0x00/*ALL*/, },
772 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0x00/*ALL*/, },
1286 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0x00/*ALL*/, },
1796 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0x00/*ALL*/, },
2306 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0x00/*ALL*/, },
2816 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0x00/*ALL*/, },
3330 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0xaf/*ALL*/, },
3844 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0xaf/*ALL*/, },
4354 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0x00/*ALL*/, },
4864 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0x00/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6797 #define REG_TC_HDGEN_BK1_1C_L _PK_L_(0x1, 0x1C) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/
H A Dhal_dac_tbl.c259 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0x00/*ALL*/, },
784 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0x00/*ALL*/, },
1313 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0x00/*ALL*/, },
1838 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0x00/*ALL*/, },
2363 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0x00/*ALL*/, },
2888 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0x00/*ALL*/, },
3417 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0xaf/*ALL*/, },
3946 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0xaf/*ALL*/, },
4471 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0x00/*ALL*/, },
4996 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/include/
H A Dmdrv_dac_tbl.c262 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0x00/*ALL*/, },
772 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0x00/*ALL*/, },
1286 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0x00/*ALL*/, },
1796 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0x00/*ALL*/, },
2306 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0x00/*ALL*/, },
2816 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0x00/*ALL*/, },
3330 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0xaf/*ALL*/, },
3844 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0xaf/*ALL*/, },
4354 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0x00/*ALL*/, },
4864 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0x00/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6797 #define REG_TC_HDGEN_BK1_1C_L _PK_L_(0x1, 0x1C) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/include/
H A Dmdrv_dac_tbl.c262 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0x00/*ALL*/, },
772 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0x00/*ALL*/, },
1286 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0x00/*ALL*/, },
1796 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0x00/*ALL*/, },
2306 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0x00/*ALL*/, },
2816 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0x00/*ALL*/, },
3330 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0xaf/*ALL*/, },
3844 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0xaf/*ALL*/, },
4354 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0x00/*ALL*/, },
4864 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1C_L), 0xFF, 0x00/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6797 #define REG_TC_HDGEN_BK1_1C_L _PK_L_(0x1, 0x1C) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/pnl/
H A Dmdrv_dac_tbl.h3115 #define REG_TC_HDGEN_BK1_1C_L _PK_L_(0x1, 0x1C) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/pnl/
H A Dmdrv_dac_tbl.h3115 #define REG_TC_HDGEN_BK1_1C_L _PK_L_(0x1, 0x1C) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/pnl/
H A Dmdrv_dac_tbl.h3115 #define REG_TC_HDGEN_BK1_1C_L _PK_L_(0x1, 0x1C) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/pnl/
H A Dmdrv_dac_tbl.h3115 #define REG_TC_HDGEN_BK1_1C_L _PK_L_(0x1, 0x1C) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/pnl/
H A Dmdrv_dac_tbl.h3115 #define REG_TC_HDGEN_BK1_1C_L _PK_L_(0x1, 0x1C) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/pnl/
H A Dmdrv_dac_tbl.h3115 #define REG_TC_HDGEN_BK1_1C_L _PK_L_(0x1, 0x1C) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/pnl/
H A Dmdrv_dac_tbl.h3115 #define REG_TC_HDGEN_BK1_1C_L _PK_L_(0x1, 0x1C) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/pnl/
H A Dmdrv_dac_tbl.h3115 #define REG_TC_HDGEN_BK1_1C_L _PK_L_(0x1, 0x1C) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/pnl/
H A Dmdrv_dac_tbl.h3115 #define REG_TC_HDGEN_BK1_1C_L _PK_L_(0x1, 0x1C) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/pnl/
H A Dmdrv_dac_tbl.h3115 #define REG_TC_HDGEN_BK1_1C_L _PK_L_(0x1, 0x1C) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/pnl/
H A Dmdrv_dac_tbl.h3115 #define REG_TC_HDGEN_BK1_1C_L _PK_L_(0x1, 0x1C) macro