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Searched refs:REG_TC_HDGEN_BK1_1B_L (Results 1 – 23 of 23) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/
H A Dhal_dac_tbl.c265 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0xda/*ALL*/, },
796 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0x00/*ALL*/, },
1331 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0xe0/*ALL*/, },
1862 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0x00/*ALL*/, },
2393 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0x00/*ALL*/, },
2924 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0x00/*ALL*/, },
3459 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0x2b/*ALL*/, },
3994 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0x2b/*ALL*/, },
4525 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0x00/*ALL*/, },
5057 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/
H A Dhal_dac_tbl.c257 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0xda/*ALL*/, },
782 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0x00/*ALL*/, },
1311 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0xe0/*ALL*/, },
1836 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0x00/*ALL*/, },
2361 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0x00/*ALL*/, },
2886 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0x00/*ALL*/, },
3415 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0x2b/*ALL*/, },
3944 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0x2b/*ALL*/, },
4469 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0x00/*ALL*/, },
4994 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/
H A Dhal_dac_tbl.c265 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0xda/*ALL*/, },
796 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0x00/*ALL*/, },
1331 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0xe0/*ALL*/, },
1862 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0x00/*ALL*/, },
2393 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0x00/*ALL*/, },
2924 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0x00/*ALL*/, },
3459 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0x2b/*ALL*/, },
3994 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0x2b/*ALL*/, },
4525 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0x00/*ALL*/, },
5056 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/include/
H A Dmdrv_dac_tbl.c260 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0xda/*ALL*/, },
770 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0x00/*ALL*/, },
1284 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0xe0/*ALL*/, },
1794 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0x00/*ALL*/, },
2304 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0x00/*ALL*/, },
2814 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0x00/*ALL*/, },
3328 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0x2b/*ALL*/, },
3842 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0x2b/*ALL*/, },
4352 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0x00/*ALL*/, },
4862 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0x00/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6795 #define REG_TC_HDGEN_BK1_1B_L _PK_L_(0x1, 0x1B) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/include/
H A Dmdrv_dac_tbl.c260 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0xda/*ALL*/, },
770 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0x00/*ALL*/, },
1284 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0xe0/*ALL*/, },
1794 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0x00/*ALL*/, },
2304 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0x00/*ALL*/, },
2814 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0x00/*ALL*/, },
3328 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0x2b/*ALL*/, },
3842 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0x2b/*ALL*/, },
4352 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0x00/*ALL*/, },
4862 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0x00/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6795 #define REG_TC_HDGEN_BK1_1B_L _PK_L_(0x1, 0x1B) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/
H A Dhal_dac_tbl.c257 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0xda/*ALL*/, },
782 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0x00/*ALL*/, },
1311 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0xe0/*ALL*/, },
1836 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0x00/*ALL*/, },
2361 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0x00/*ALL*/, },
2886 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0x00/*ALL*/, },
3415 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0x2b/*ALL*/, },
3944 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0x2b/*ALL*/, },
4469 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0x00/*ALL*/, },
4994 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/include/
H A Dmdrv_dac_tbl.c260 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0xda/*ALL*/, },
770 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0x00/*ALL*/, },
1284 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0xe0/*ALL*/, },
1794 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0x00/*ALL*/, },
2304 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0x00/*ALL*/, },
2814 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0x00/*ALL*/, },
3328 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0x2b/*ALL*/, },
3842 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0x2b/*ALL*/, },
4352 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0x00/*ALL*/, },
4862 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0x00/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6795 #define REG_TC_HDGEN_BK1_1B_L _PK_L_(0x1, 0x1B) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/include/
H A Dmdrv_dac_tbl.c260 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0xda/*ALL*/, },
770 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0x00/*ALL*/, },
1284 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0xe0/*ALL*/, },
1794 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0x00/*ALL*/, },
2304 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0x00/*ALL*/, },
2814 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0x00/*ALL*/, },
3328 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0x2b/*ALL*/, },
3842 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0x2b/*ALL*/, },
4352 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0x00/*ALL*/, },
4862 { DRV_DAC_REG(REG_TC_HDGEN_BK1_1B_L), 0xFF, 0x00/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6795 #define REG_TC_HDGEN_BK1_1B_L _PK_L_(0x1, 0x1B) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/pnl/
H A Dmdrv_dac_tbl.h3113 #define REG_TC_HDGEN_BK1_1B_L _PK_L_(0x1, 0x1B) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/pnl/
H A Dmdrv_dac_tbl.h3113 #define REG_TC_HDGEN_BK1_1B_L _PK_L_(0x1, 0x1B) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/pnl/
H A Dmdrv_dac_tbl.h3113 #define REG_TC_HDGEN_BK1_1B_L _PK_L_(0x1, 0x1B) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/pnl/
H A Dmdrv_dac_tbl.h3113 #define REG_TC_HDGEN_BK1_1B_L _PK_L_(0x1, 0x1B) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/pnl/
H A Dmdrv_dac_tbl.h3113 #define REG_TC_HDGEN_BK1_1B_L _PK_L_(0x1, 0x1B) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/pnl/
H A Dmdrv_dac_tbl.h3113 #define REG_TC_HDGEN_BK1_1B_L _PK_L_(0x1, 0x1B) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/pnl/
H A Dmdrv_dac_tbl.h3113 #define REG_TC_HDGEN_BK1_1B_L _PK_L_(0x1, 0x1B) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/pnl/
H A Dmdrv_dac_tbl.h3113 #define REG_TC_HDGEN_BK1_1B_L _PK_L_(0x1, 0x1B) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/pnl/
H A Dmdrv_dac_tbl.h3113 #define REG_TC_HDGEN_BK1_1B_L _PK_L_(0x1, 0x1B) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/pnl/
H A Dmdrv_dac_tbl.h3113 #define REG_TC_HDGEN_BK1_1B_L _PK_L_(0x1, 0x1B) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/pnl/
H A Dmdrv_dac_tbl.h3113 #define REG_TC_HDGEN_BK1_1B_L _PK_L_(0x1, 0x1B) macro