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Searched refs:REG_TC_HDGEN_BK1_19_L (Results 1 – 23 of 23) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/
H A Dhal_dac_tbl.c261 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x02/*ALL*/, },
792 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x00/*ALL*/, },
1327 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x6a/*ALL*/, },
1858 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x00/*ALL*/, },
2389 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x00/*ALL*/, },
2920 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x00/*ALL*/, },
3455 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x63/*ALL*/, },
3990 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x63/*ALL*/, },
4521 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x00/*ALL*/, },
5053 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/
H A Dhal_dac_tbl.c253 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x02/*ALL*/, },
778 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x00/*ALL*/, },
1307 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x6a/*ALL*/, },
1832 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x00/*ALL*/, },
2357 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x00/*ALL*/, },
2882 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x00/*ALL*/, },
3411 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x63/*ALL*/, },
3940 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x63/*ALL*/, },
4465 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x00/*ALL*/, },
4990 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/
H A Dhal_dac_tbl.c261 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x02/*ALL*/, },
792 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x00/*ALL*/, },
1327 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x6a/*ALL*/, },
1858 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x00/*ALL*/, },
2389 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x00/*ALL*/, },
2920 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x00/*ALL*/, },
3455 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x63/*ALL*/, },
3990 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x63/*ALL*/, },
4521 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x00/*ALL*/, },
5052 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/include/
H A Dmdrv_dac_tbl.c256 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x02/*ALL*/, },
766 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x00/*ALL*/, },
1280 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x6a/*ALL*/, },
1790 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x00/*ALL*/, },
2300 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x00/*ALL*/, },
2810 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x00/*ALL*/, },
3324 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x63/*ALL*/, },
3838 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x63/*ALL*/, },
4348 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x00/*ALL*/, },
4858 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x00/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6791 #define REG_TC_HDGEN_BK1_19_L _PK_L_(0x1, 0x19) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/include/
H A Dmdrv_dac_tbl.c256 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x02/*ALL*/, },
766 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x00/*ALL*/, },
1280 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x6a/*ALL*/, },
1790 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x00/*ALL*/, },
2300 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x00/*ALL*/, },
2810 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x00/*ALL*/, },
3324 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x63/*ALL*/, },
3838 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x63/*ALL*/, },
4348 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x00/*ALL*/, },
4858 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x00/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6791 #define REG_TC_HDGEN_BK1_19_L _PK_L_(0x1, 0x19) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/
H A Dhal_dac_tbl.c253 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x02/*ALL*/, },
778 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x00/*ALL*/, },
1307 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x6a/*ALL*/, },
1832 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x00/*ALL*/, },
2357 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x00/*ALL*/, },
2882 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x00/*ALL*/, },
3411 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x63/*ALL*/, },
3940 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x63/*ALL*/, },
4465 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x00/*ALL*/, },
4990 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/include/
H A Dmdrv_dac_tbl.c256 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x02/*ALL*/, },
766 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x00/*ALL*/, },
1280 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x6a/*ALL*/, },
1790 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x00/*ALL*/, },
2300 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x00/*ALL*/, },
2810 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x00/*ALL*/, },
3324 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x63/*ALL*/, },
3838 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x63/*ALL*/, },
4348 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x00/*ALL*/, },
4858 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x00/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6791 #define REG_TC_HDGEN_BK1_19_L _PK_L_(0x1, 0x19) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/include/
H A Dmdrv_dac_tbl.c256 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x02/*ALL*/, },
766 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x00/*ALL*/, },
1280 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x6a/*ALL*/, },
1790 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x00/*ALL*/, },
2300 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x00/*ALL*/, },
2810 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x00/*ALL*/, },
3324 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x63/*ALL*/, },
3838 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x63/*ALL*/, },
4348 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x00/*ALL*/, },
4858 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_L), 0xFF, 0x00/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6791 #define REG_TC_HDGEN_BK1_19_L _PK_L_(0x1, 0x19) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/pnl/
H A Dmdrv_dac_tbl.h3109 #define REG_TC_HDGEN_BK1_19_L _PK_L_(0x1, 0x19) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/pnl/
H A Dmdrv_dac_tbl.h3109 #define REG_TC_HDGEN_BK1_19_L _PK_L_(0x1, 0x19) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/pnl/
H A Dmdrv_dac_tbl.h3109 #define REG_TC_HDGEN_BK1_19_L _PK_L_(0x1, 0x19) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/pnl/
H A Dmdrv_dac_tbl.h3109 #define REG_TC_HDGEN_BK1_19_L _PK_L_(0x1, 0x19) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/pnl/
H A Dmdrv_dac_tbl.h3109 #define REG_TC_HDGEN_BK1_19_L _PK_L_(0x1, 0x19) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/pnl/
H A Dmdrv_dac_tbl.h3109 #define REG_TC_HDGEN_BK1_19_L _PK_L_(0x1, 0x19) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/pnl/
H A Dmdrv_dac_tbl.h3109 #define REG_TC_HDGEN_BK1_19_L _PK_L_(0x1, 0x19) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/pnl/
H A Dmdrv_dac_tbl.h3109 #define REG_TC_HDGEN_BK1_19_L _PK_L_(0x1, 0x19) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/pnl/
H A Dmdrv_dac_tbl.h3109 #define REG_TC_HDGEN_BK1_19_L _PK_L_(0x1, 0x19) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/pnl/
H A Dmdrv_dac_tbl.h3109 #define REG_TC_HDGEN_BK1_19_L _PK_L_(0x1, 0x19) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/pnl/
H A Dmdrv_dac_tbl.h3109 #define REG_TC_HDGEN_BK1_19_L _PK_L_(0x1, 0x19) macro