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Searched refs:REG_TC_HDGEN_BK1_19_H (Results 1 – 23 of 23) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/
H A Dhal_dac_tbl.c262 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x02/*ALL*/, },
793 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x00/*ALL*/, },
1328 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x02/*ALL*/, },
1859 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x00/*ALL*/, },
2390 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x00/*ALL*/, },
2921 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x00/*ALL*/, },
3456 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x04/*ALL*/, },
3991 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x04/*ALL*/, },
4522 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x00/*ALL*/, },
5054 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/
H A Dhal_dac_tbl.c254 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x02/*ALL*/, },
779 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x00/*ALL*/, },
1308 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x02/*ALL*/, },
1833 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x00/*ALL*/, },
2358 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x00/*ALL*/, },
2883 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x00/*ALL*/, },
3412 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x04/*ALL*/, },
3941 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x04/*ALL*/, },
4466 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x00/*ALL*/, },
4991 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/
H A Dhal_dac_tbl.c262 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x02/*ALL*/, },
793 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x00/*ALL*/, },
1328 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x02/*ALL*/, },
1859 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x00/*ALL*/, },
2390 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x00/*ALL*/, },
2921 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x00/*ALL*/, },
3456 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x04/*ALL*/, },
3991 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x04/*ALL*/, },
4522 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x00/*ALL*/, },
5053 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/include/
H A Dmdrv_dac_tbl.c257 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x02/*ALL*/, },
767 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x00/*ALL*/, },
1281 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x02/*ALL*/, },
1791 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x00/*ALL*/, },
2301 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x00/*ALL*/, },
2811 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x00/*ALL*/, },
3325 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x04/*ALL*/, },
3839 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x04/*ALL*/, },
4349 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x00/*ALL*/, },
4859 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x00/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6792 #define REG_TC_HDGEN_BK1_19_H _PK_H_(0x1, 0x19) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/include/
H A Dmdrv_dac_tbl.c257 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x02/*ALL*/, },
767 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x00/*ALL*/, },
1281 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x02/*ALL*/, },
1791 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x00/*ALL*/, },
2301 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x00/*ALL*/, },
2811 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x00/*ALL*/, },
3325 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x04/*ALL*/, },
3839 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x04/*ALL*/, },
4349 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x00/*ALL*/, },
4859 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x00/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6792 #define REG_TC_HDGEN_BK1_19_H _PK_H_(0x1, 0x19) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/
H A Dhal_dac_tbl.c254 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x02/*ALL*/, },
779 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x00/*ALL*/, },
1308 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x02/*ALL*/, },
1833 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x00/*ALL*/, },
2358 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x00/*ALL*/, },
2883 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x00/*ALL*/, },
3412 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x04/*ALL*/, },
3941 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x04/*ALL*/, },
4466 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x00/*ALL*/, },
4991 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/include/
H A Dmdrv_dac_tbl.c257 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x02/*ALL*/, },
767 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x00/*ALL*/, },
1281 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x02/*ALL*/, },
1791 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x00/*ALL*/, },
2301 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x00/*ALL*/, },
2811 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x00/*ALL*/, },
3325 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x04/*ALL*/, },
3839 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x04/*ALL*/, },
4349 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x00/*ALL*/, },
4859 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x00/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6792 #define REG_TC_HDGEN_BK1_19_H _PK_H_(0x1, 0x19) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/include/
H A Dmdrv_dac_tbl.c257 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x02/*ALL*/, },
767 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x00/*ALL*/, },
1281 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x02/*ALL*/, },
1791 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x00/*ALL*/, },
2301 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x00/*ALL*/, },
2811 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x00/*ALL*/, },
3325 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x04/*ALL*/, },
3839 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x04/*ALL*/, },
4349 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x00/*ALL*/, },
4859 { DRV_DAC_REG(REG_TC_HDGEN_BK1_19_H), 0xFF, 0x00/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6792 #define REG_TC_HDGEN_BK1_19_H _PK_H_(0x1, 0x19) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/pnl/
H A Dmdrv_dac_tbl.h3110 #define REG_TC_HDGEN_BK1_19_H _PK_H_(0x1, 0x19) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/pnl/
H A Dmdrv_dac_tbl.h3110 #define REG_TC_HDGEN_BK1_19_H _PK_H_(0x1, 0x19) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/pnl/
H A Dmdrv_dac_tbl.h3110 #define REG_TC_HDGEN_BK1_19_H _PK_H_(0x1, 0x19) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/pnl/
H A Dmdrv_dac_tbl.h3110 #define REG_TC_HDGEN_BK1_19_H _PK_H_(0x1, 0x19) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/pnl/
H A Dmdrv_dac_tbl.h3110 #define REG_TC_HDGEN_BK1_19_H _PK_H_(0x1, 0x19) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/pnl/
H A Dmdrv_dac_tbl.h3110 #define REG_TC_HDGEN_BK1_19_H _PK_H_(0x1, 0x19) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/pnl/
H A Dmdrv_dac_tbl.h3110 #define REG_TC_HDGEN_BK1_19_H _PK_H_(0x1, 0x19) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/pnl/
H A Dmdrv_dac_tbl.h3110 #define REG_TC_HDGEN_BK1_19_H _PK_H_(0x1, 0x19) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/pnl/
H A Dmdrv_dac_tbl.h3110 #define REG_TC_HDGEN_BK1_19_H _PK_H_(0x1, 0x19) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/pnl/
H A Dmdrv_dac_tbl.h3110 #define REG_TC_HDGEN_BK1_19_H _PK_H_(0x1, 0x19) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/pnl/
H A Dmdrv_dac_tbl.h3110 #define REG_TC_HDGEN_BK1_19_H _PK_H_(0x1, 0x19) macro