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Searched refs:REG_TC_HDGEN_BK1_17_L (Results 1 – 23 of 23) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/
H A Dhal_dac_tbl.c257 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0xc0/*ALL*/, },
788 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0x00/*ALL*/, },
1323 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0xe0/*ALL*/, },
1854 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0x00/*ALL*/, },
2385 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0x00/*ALL*/, },
2916 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0x00/*ALL*/, },
3451 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0xfe/*ALL*/, },
3986 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0xfe/*ALL*/, },
4517 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0x00/*ALL*/, },
5049 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/
H A Dhal_dac_tbl.c249 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0xc0/*ALL*/, },
774 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0x00/*ALL*/, },
1303 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0xe0/*ALL*/, },
1828 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0x00/*ALL*/, },
2353 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0x00/*ALL*/, },
2878 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0x00/*ALL*/, },
3407 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0xfe/*ALL*/, },
3936 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0xfe/*ALL*/, },
4461 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0x00/*ALL*/, },
4986 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/
H A Dhal_dac_tbl.c257 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0xc0/*ALL*/, },
788 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0x00/*ALL*/, },
1323 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0xe0/*ALL*/, },
1854 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0x00/*ALL*/, },
2385 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0x00/*ALL*/, },
2916 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0x00/*ALL*/, },
3451 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0xfe/*ALL*/, },
3986 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0xfe/*ALL*/, },
4517 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0x00/*ALL*/, },
5048 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/include/
H A Dmdrv_dac_tbl.c252 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0xc0/*ALL*/, },
762 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0x00/*ALL*/, },
1276 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0xe0/*ALL*/, },
1786 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0x00/*ALL*/, },
2296 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0x00/*ALL*/, },
2806 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0x00/*ALL*/, },
3320 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0xfe/*ALL*/, },
3834 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0xfe/*ALL*/, },
4344 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0x00/*ALL*/, },
4854 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0x00/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6787 #define REG_TC_HDGEN_BK1_17_L _PK_L_(0x1, 0x17) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/include/
H A Dmdrv_dac_tbl.c252 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0xc0/*ALL*/, },
762 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0x00/*ALL*/, },
1276 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0xe0/*ALL*/, },
1786 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0x00/*ALL*/, },
2296 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0x00/*ALL*/, },
2806 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0x00/*ALL*/, },
3320 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0xfe/*ALL*/, },
3834 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0xfe/*ALL*/, },
4344 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0x00/*ALL*/, },
4854 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0x00/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6787 #define REG_TC_HDGEN_BK1_17_L _PK_L_(0x1, 0x17) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/
H A Dhal_dac_tbl.c249 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0xc0/*ALL*/, },
774 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0x00/*ALL*/, },
1303 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0xe0/*ALL*/, },
1828 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0x00/*ALL*/, },
2353 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0x00/*ALL*/, },
2878 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0x00/*ALL*/, },
3407 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0xfe/*ALL*/, },
3936 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0xfe/*ALL*/, },
4461 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0x00/*ALL*/, },
4986 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/include/
H A Dmdrv_dac_tbl.c252 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0xc0/*ALL*/, },
762 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0x00/*ALL*/, },
1276 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0xe0/*ALL*/, },
1786 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0x00/*ALL*/, },
2296 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0x00/*ALL*/, },
2806 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0x00/*ALL*/, },
3320 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0xfe/*ALL*/, },
3834 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0xfe/*ALL*/, },
4344 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0x00/*ALL*/, },
4854 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0x00/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6787 #define REG_TC_HDGEN_BK1_17_L _PK_L_(0x1, 0x17) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/include/
H A Dmdrv_dac_tbl.c252 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0xc0/*ALL*/, },
762 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0x00/*ALL*/, },
1276 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0xe0/*ALL*/, },
1786 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0x00/*ALL*/, },
2296 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0x00/*ALL*/, },
2806 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0x00/*ALL*/, },
3320 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0xfe/*ALL*/, },
3834 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0xfe/*ALL*/, },
4344 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0x00/*ALL*/, },
4854 { DRV_DAC_REG(REG_TC_HDGEN_BK1_17_L), 0xFF, 0x00/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6787 #define REG_TC_HDGEN_BK1_17_L _PK_L_(0x1, 0x17) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/pnl/
H A Dmdrv_dac_tbl.h3105 #define REG_TC_HDGEN_BK1_17_L _PK_L_(0x1, 0x17) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/pnl/
H A Dmdrv_dac_tbl.h3105 #define REG_TC_HDGEN_BK1_17_L _PK_L_(0x1, 0x17) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/pnl/
H A Dmdrv_dac_tbl.h3105 #define REG_TC_HDGEN_BK1_17_L _PK_L_(0x1, 0x17) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/pnl/
H A Dmdrv_dac_tbl.h3105 #define REG_TC_HDGEN_BK1_17_L _PK_L_(0x1, 0x17) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/pnl/
H A Dmdrv_dac_tbl.h3105 #define REG_TC_HDGEN_BK1_17_L _PK_L_(0x1, 0x17) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/pnl/
H A Dmdrv_dac_tbl.h3105 #define REG_TC_HDGEN_BK1_17_L _PK_L_(0x1, 0x17) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/pnl/
H A Dmdrv_dac_tbl.h3105 #define REG_TC_HDGEN_BK1_17_L _PK_L_(0x1, 0x17) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/pnl/
H A Dmdrv_dac_tbl.h3105 #define REG_TC_HDGEN_BK1_17_L _PK_L_(0x1, 0x17) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/pnl/
H A Dmdrv_dac_tbl.h3105 #define REG_TC_HDGEN_BK1_17_L _PK_L_(0x1, 0x17) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/pnl/
H A Dmdrv_dac_tbl.h3105 #define REG_TC_HDGEN_BK1_17_L _PK_L_(0x1, 0x17) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/pnl/
H A Dmdrv_dac_tbl.h3105 #define REG_TC_HDGEN_BK1_17_L _PK_L_(0x1, 0x17) macro