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Searched refs:REG_TC_HDGEN_BK1_16_L (Results 1 – 23 of 23) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/
H A Dhal_dac_tbl.c255 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
786 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
1321 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
1852 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
2383 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
2914 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
3449 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
3984 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
4515 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
5047 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/
H A Dhal_dac_tbl.c247 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
772 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
1301 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
1826 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
2351 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
2876 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
3405 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
3934 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
4459 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
4984 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/
H A Dhal_dac_tbl.c255 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
786 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
1321 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
1852 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
2383 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
2914 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
3449 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
3984 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
4515 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
5046 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/include/
H A Dmdrv_dac_tbl.c250 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
760 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
1274 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
1784 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
2294 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
2804 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
3318 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
3832 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
4342 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
4852 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6785 #define REG_TC_HDGEN_BK1_16_L _PK_L_(0x1, 0x16) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/include/
H A Dmdrv_dac_tbl.c250 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
760 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
1274 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
1784 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
2294 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
2804 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
3318 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
3832 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
4342 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
4852 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6785 #define REG_TC_HDGEN_BK1_16_L _PK_L_(0x1, 0x16) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/
H A Dhal_dac_tbl.c247 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
772 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
1301 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
1826 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
2351 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
2876 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
3405 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
3934 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
4459 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
4984 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/include/
H A Dmdrv_dac_tbl.c250 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
760 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
1274 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
1784 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
2294 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
2804 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
3318 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
3832 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
4342 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
4852 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6785 #define REG_TC_HDGEN_BK1_16_L _PK_L_(0x1, 0x16) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/include/
H A Dmdrv_dac_tbl.c250 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
760 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
1274 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
1784 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
2294 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
2804 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
3318 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
3832 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
4342 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
4852 { DRV_DAC_REG(REG_TC_HDGEN_BK1_16_L), 0xFF, 0x00/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6785 #define REG_TC_HDGEN_BK1_16_L _PK_L_(0x1, 0x16) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/pnl/
H A Dmdrv_dac_tbl.h3103 #define REG_TC_HDGEN_BK1_16_L _PK_L_(0x1, 0x16) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/pnl/
H A Dmdrv_dac_tbl.h3103 #define REG_TC_HDGEN_BK1_16_L _PK_L_(0x1, 0x16) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/pnl/
H A Dmdrv_dac_tbl.h3103 #define REG_TC_HDGEN_BK1_16_L _PK_L_(0x1, 0x16) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/pnl/
H A Dmdrv_dac_tbl.h3103 #define REG_TC_HDGEN_BK1_16_L _PK_L_(0x1, 0x16) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/pnl/
H A Dmdrv_dac_tbl.h3103 #define REG_TC_HDGEN_BK1_16_L _PK_L_(0x1, 0x16) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/pnl/
H A Dmdrv_dac_tbl.h3103 #define REG_TC_HDGEN_BK1_16_L _PK_L_(0x1, 0x16) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/pnl/
H A Dmdrv_dac_tbl.h3103 #define REG_TC_HDGEN_BK1_16_L _PK_L_(0x1, 0x16) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/pnl/
H A Dmdrv_dac_tbl.h3103 #define REG_TC_HDGEN_BK1_16_L _PK_L_(0x1, 0x16) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/pnl/
H A Dmdrv_dac_tbl.h3103 #define REG_TC_HDGEN_BK1_16_L _PK_L_(0x1, 0x16) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/pnl/
H A Dmdrv_dac_tbl.h3103 #define REG_TC_HDGEN_BK1_16_L _PK_L_(0x1, 0x16) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/pnl/
H A Dmdrv_dac_tbl.h3103 #define REG_TC_HDGEN_BK1_16_L _PK_L_(0x1, 0x16) macro