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Searched refs:REG_TC_HDGEN_BK1_14_L (Results 1 – 23 of 23) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/
H A Dhal_dac_tbl.c251 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0x00/*ALL*/, },
782 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0x00/*ALL*/, },
1317 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0x00/*ALL*/, },
1848 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0x00/*ALL*/, },
2379 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0x2c/*ALL*/, },
2910 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0x2c/*ALL*/, },
3445 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0x00/*ALL*/, },
3980 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0x00/*ALL*/, },
4511 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0xaf/*ALL*/, },
5043 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0xaf/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/
H A Dhal_dac_tbl.c243 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0x00/*ALL*/, },
768 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0x00/*ALL*/, },
1297 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0x00/*ALL*/, },
1822 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0x00/*ALL*/, },
2347 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0x2c/*ALL*/, },
2872 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0x2c/*ALL*/, },
3401 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0x00/*ALL*/, },
3930 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0x00/*ALL*/, },
4455 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0xaf/*ALL*/, },
4980 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0xaf/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/
H A Dhal_dac_tbl.c251 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0x00/*ALL*/, },
782 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0x00/*ALL*/, },
1317 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0x00/*ALL*/, },
1848 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0x00/*ALL*/, },
2379 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0x2c/*ALL*/, },
2910 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0x2c/*ALL*/, },
3445 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0x00/*ALL*/, },
3980 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0x00/*ALL*/, },
4511 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0xaf/*ALL*/, },
5042 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0xaf/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/include/
H A Dmdrv_dac_tbl.c246 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0x00/*ALL*/, },
756 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0x00/*ALL*/, },
1270 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0x00/*ALL*/, },
1780 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0x00/*ALL*/, },
2290 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0x2c/*ALL*/, },
2800 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0x2c/*ALL*/, },
3314 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0x00/*ALL*/, },
3828 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0x00/*ALL*/, },
4338 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0xaf/*ALL*/, },
4848 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0xaf/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6781 #define REG_TC_HDGEN_BK1_14_L _PK_L_(0x1, 0x14) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/include/
H A Dmdrv_dac_tbl.c246 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0x00/*ALL*/, },
756 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0x00/*ALL*/, },
1270 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0x00/*ALL*/, },
1780 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0x00/*ALL*/, },
2290 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0x2c/*ALL*/, },
2800 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0x2c/*ALL*/, },
3314 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0x00/*ALL*/, },
3828 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0x00/*ALL*/, },
4338 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0xaf/*ALL*/, },
4848 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0xaf/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6781 #define REG_TC_HDGEN_BK1_14_L _PK_L_(0x1, 0x14) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/
H A Dhal_dac_tbl.c243 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0x00/*ALL*/, },
768 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0x00/*ALL*/, },
1297 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0x00/*ALL*/, },
1822 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0x00/*ALL*/, },
2347 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0x2c/*ALL*/, },
2872 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0x2c/*ALL*/, },
3401 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0x00/*ALL*/, },
3930 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0x00/*ALL*/, },
4455 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0xaf/*ALL*/, },
4980 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0xaf/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/include/
H A Dmdrv_dac_tbl.c246 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0x00/*ALL*/, },
756 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0x00/*ALL*/, },
1270 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0x00/*ALL*/, },
1780 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0x00/*ALL*/, },
2290 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0x2c/*ALL*/, },
2800 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0x2c/*ALL*/, },
3314 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0x00/*ALL*/, },
3828 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0x00/*ALL*/, },
4338 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0xaf/*ALL*/, },
4848 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0xaf/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6781 #define REG_TC_HDGEN_BK1_14_L _PK_L_(0x1, 0x14) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/include/
H A Dmdrv_dac_tbl.c246 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0x00/*ALL*/, },
756 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0x00/*ALL*/, },
1270 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0x00/*ALL*/, },
1780 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0x00/*ALL*/, },
2290 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0x2c/*ALL*/, },
2800 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0x2c/*ALL*/, },
3314 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0x00/*ALL*/, },
3828 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0x00/*ALL*/, },
4338 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0xaf/*ALL*/, },
4848 { DRV_DAC_REG(REG_TC_HDGEN_BK1_14_L), 0xFF, 0xaf/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6781 #define REG_TC_HDGEN_BK1_14_L _PK_L_(0x1, 0x14) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/pnl/
H A Dmdrv_dac_tbl.h3099 #define REG_TC_HDGEN_BK1_14_L _PK_L_(0x1, 0x14) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/pnl/
H A Dmdrv_dac_tbl.h3099 #define REG_TC_HDGEN_BK1_14_L _PK_L_(0x1, 0x14) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/pnl/
H A Dmdrv_dac_tbl.h3099 #define REG_TC_HDGEN_BK1_14_L _PK_L_(0x1, 0x14) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/pnl/
H A Dmdrv_dac_tbl.h3099 #define REG_TC_HDGEN_BK1_14_L _PK_L_(0x1, 0x14) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/pnl/
H A Dmdrv_dac_tbl.h3099 #define REG_TC_HDGEN_BK1_14_L _PK_L_(0x1, 0x14) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/pnl/
H A Dmdrv_dac_tbl.h3099 #define REG_TC_HDGEN_BK1_14_L _PK_L_(0x1, 0x14) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/pnl/
H A Dmdrv_dac_tbl.h3099 #define REG_TC_HDGEN_BK1_14_L _PK_L_(0x1, 0x14) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/pnl/
H A Dmdrv_dac_tbl.h3099 #define REG_TC_HDGEN_BK1_14_L _PK_L_(0x1, 0x14) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/pnl/
H A Dmdrv_dac_tbl.h3099 #define REG_TC_HDGEN_BK1_14_L _PK_L_(0x1, 0x14) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/pnl/
H A Dmdrv_dac_tbl.h3099 #define REG_TC_HDGEN_BK1_14_L _PK_L_(0x1, 0x14) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/pnl/
H A Dmdrv_dac_tbl.h3099 #define REG_TC_HDGEN_BK1_14_L _PK_L_(0x1, 0x14) macro