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Searched refs:REG_TC_HDGEN_BK1_12_L (Results 1 – 23 of 23) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/
H A Dhal_dac_tbl.c247 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0x59/*ALL*/, },
778 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0x59/*ALL*/, },
1313 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0x5f/*ALL*/, },
1844 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0x5f/*ALL*/, },
2375 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0xbb/*ALL*/, },
2906 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0x71/*ALL*/, },
3441 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0x27/*ALL*/, },
3976 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0x4b/*ALL*/, },
4507 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0x4f/*ALL*/, },
5039 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0x97/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/
H A Dhal_dac_tbl.c239 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0x59/*ALL*/, },
764 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0x59/*ALL*/, },
1293 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0x5f/*ALL*/, },
1818 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0x5f/*ALL*/, },
2343 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0xbb/*ALL*/, },
2868 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0x71/*ALL*/, },
3397 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0x27/*ALL*/, },
3926 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0x4b/*ALL*/, },
4451 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0x4f/*ALL*/, },
4976 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0x97/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/
H A Dhal_dac_tbl.c247 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0x59/*ALL*/, },
778 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0x59/*ALL*/, },
1313 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0x5f/*ALL*/, },
1844 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0x5f/*ALL*/, },
2375 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0xbb/*ALL*/, },
2906 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0x71/*ALL*/, },
3441 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0x27/*ALL*/, },
3976 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0x4b/*ALL*/, },
4507 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0x4f/*ALL*/, },
5038 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0x97/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/include/
H A Dmdrv_dac_tbl.c242 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0x59/*ALL*/, },
752 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0x59/*ALL*/, },
1266 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0x5f/*ALL*/, },
1776 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0x5f/*ALL*/, },
2286 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0xbb/*ALL*/, },
2796 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0x71/*ALL*/, },
3310 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0x27/*ALL*/, },
3824 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0x4b/*ALL*/, },
4334 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0x4f/*ALL*/, },
4844 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0x97/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6777 #define REG_TC_HDGEN_BK1_12_L _PK_L_(0x1, 0x12) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/include/
H A Dmdrv_dac_tbl.c242 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0x59/*ALL*/, },
752 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0x59/*ALL*/, },
1266 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0x5f/*ALL*/, },
1776 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0x5f/*ALL*/, },
2286 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0xbb/*ALL*/, },
2796 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0x71/*ALL*/, },
3310 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0x27/*ALL*/, },
3824 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0x4b/*ALL*/, },
4334 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0x4f/*ALL*/, },
4844 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0x97/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6777 #define REG_TC_HDGEN_BK1_12_L _PK_L_(0x1, 0x12) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/
H A Dhal_dac_tbl.c239 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0x59/*ALL*/, },
764 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0x59/*ALL*/, },
1293 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0x5f/*ALL*/, },
1818 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0x5f/*ALL*/, },
2343 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0xbb/*ALL*/, },
2868 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0x71/*ALL*/, },
3397 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0x27/*ALL*/, },
3926 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0x4b/*ALL*/, },
4451 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0x4f/*ALL*/, },
4976 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0x97/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/include/
H A Dmdrv_dac_tbl.c242 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0x59/*ALL*/, },
752 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0x59/*ALL*/, },
1266 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0x5f/*ALL*/, },
1776 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0x5f/*ALL*/, },
2286 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0xbb/*ALL*/, },
2796 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0x71/*ALL*/, },
3310 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0x27/*ALL*/, },
3824 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0x4b/*ALL*/, },
4334 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0x4f/*ALL*/, },
4844 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0x97/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6777 #define REG_TC_HDGEN_BK1_12_L _PK_L_(0x1, 0x12) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/include/
H A Dmdrv_dac_tbl.c242 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0x59/*ALL*/, },
752 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0x59/*ALL*/, },
1266 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0x5f/*ALL*/, },
1776 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0x5f/*ALL*/, },
2286 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0xbb/*ALL*/, },
2796 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0x71/*ALL*/, },
3310 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0x27/*ALL*/, },
3824 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0x4b/*ALL*/, },
4334 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0x4f/*ALL*/, },
4844 { DRV_DAC_REG(REG_TC_HDGEN_BK1_12_L), 0xFF, 0x97/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h6777 #define REG_TC_HDGEN_BK1_12_L _PK_L_(0x1, 0x12) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/pnl/
H A Dmdrv_dac_tbl.h3095 #define REG_TC_HDGEN_BK1_12_L _PK_L_(0x1, 0x12) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/pnl/
H A Dmdrv_dac_tbl.h3095 #define REG_TC_HDGEN_BK1_12_L _PK_L_(0x1, 0x12) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/pnl/
H A Dmdrv_dac_tbl.h3095 #define REG_TC_HDGEN_BK1_12_L _PK_L_(0x1, 0x12) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/pnl/
H A Dmdrv_dac_tbl.h3095 #define REG_TC_HDGEN_BK1_12_L _PK_L_(0x1, 0x12) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/pnl/
H A Dmdrv_dac_tbl.h3095 #define REG_TC_HDGEN_BK1_12_L _PK_L_(0x1, 0x12) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/pnl/
H A Dmdrv_dac_tbl.h3095 #define REG_TC_HDGEN_BK1_12_L _PK_L_(0x1, 0x12) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/pnl/
H A Dmdrv_dac_tbl.h3095 #define REG_TC_HDGEN_BK1_12_L _PK_L_(0x1, 0x12) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/pnl/
H A Dmdrv_dac_tbl.h3095 #define REG_TC_HDGEN_BK1_12_L _PK_L_(0x1, 0x12) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/pnl/
H A Dmdrv_dac_tbl.h3095 #define REG_TC_HDGEN_BK1_12_L _PK_L_(0x1, 0x12) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/pnl/
H A Dmdrv_dac_tbl.h3095 #define REG_TC_HDGEN_BK1_12_L _PK_L_(0x1, 0x12) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/pnl/
H A Dmdrv_dac_tbl.h3095 #define REG_TC_HDGEN_BK1_12_L _PK_L_(0x1, 0x12) macro