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Searched refs:REG_TC_CLK_GEN_5E_H (Results 1 – 25 of 38) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/
H A Dhal_dac_tbl.c585 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0F, 0x00/*ALL*/, },
1116 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0F, 0x00/*ALL*/, },
1651 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0F, 0x00/*ALL*/, },
2182 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0F, 0x00/*ALL*/, },
2713 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0F, 0x00/*ALL*/, },
3244 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0F, 0x00/*ALL*/, },
3779 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0F, 0x00/*ALL*/, },
4314 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0F, 0x00/*ALL*/, },
4845 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0F, 0x00/*ALL*/, },
5377 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0F, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/
H A Dhal_dac_tbl.c579 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0F, 0x00/*ALL*/, },
1104 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0F, 0x00/*ALL*/, },
1633 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0F, 0x00/*ALL*/, },
2158 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0F, 0x00/*ALL*/, },
2683 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0F, 0x00/*ALL*/, },
3208 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0F, 0x00/*ALL*/, },
3737 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0F, 0x00/*ALL*/, },
4266 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0F, 0x00/*ALL*/, },
4791 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0F, 0x00/*ALL*/, },
5316 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0F, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/
H A Dhal_dac_tbl.c585 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0F, 0x00/*ALL*/, },
1116 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0F, 0x00/*ALL*/, },
1651 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0F, 0x00/*ALL*/, },
2182 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0F, 0x00/*ALL*/, },
2713 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0F, 0x00/*ALL*/, },
3244 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0F, 0x00/*ALL*/, },
3779 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0F, 0x00/*ALL*/, },
4314 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0F, 0x00/*ALL*/, },
4845 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0F, 0x00/*ALL*/, },
5376 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0F, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/include/
H A Dmdrv_dac_tbl.c564 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0C, 0x00/*ALL*/, },
1074 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0C, 0x00/*ALL*/, },
1588 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0C, 0x00/*ALL*/, },
2098 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0C, 0x00/*ALL*/, },
2608 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0C, 0x00/*ALL*/, },
3118 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0C, 0x00/*ALL*/, },
3632 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0C, 0x00/*ALL*/, },
4146 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0C, 0x00/*ALL*/, },
4656 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0C, 0x00/*ALL*/, },
5166 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0C, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/include/
H A Dmdrv_dac_tbl.c564 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0C, 0x00/*ALL*/, },
1074 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0C, 0x00/*ALL*/, },
1588 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0C, 0x00/*ALL*/, },
2098 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0C, 0x00/*ALL*/, },
2608 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0C, 0x00/*ALL*/, },
3118 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0C, 0x00/*ALL*/, },
3632 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0C, 0x00/*ALL*/, },
4146 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0C, 0x00/*ALL*/, },
4656 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0C, 0x00/*ALL*/, },
5166 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0C, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/
H A Dhal_dac_tbl.c579 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0F, 0x00/*ALL*/, },
1104 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0F, 0x00/*ALL*/, },
1633 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0F, 0x00/*ALL*/, },
2158 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0F, 0x00/*ALL*/, },
2683 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0F, 0x00/*ALL*/, },
3208 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0F, 0x00/*ALL*/, },
3737 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0F, 0x00/*ALL*/, },
4266 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0F, 0x00/*ALL*/, },
4791 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0F, 0x00/*ALL*/, },
5316 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0F, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/include/
H A Dmdrv_dac_tbl.c564 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0C, 0x00/*ALL*/, },
1074 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0C, 0x00/*ALL*/, },
1588 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0C, 0x00/*ALL*/, },
2098 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0C, 0x00/*ALL*/, },
2608 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0C, 0x00/*ALL*/, },
3118 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0C, 0x00/*ALL*/, },
3632 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0C, 0x00/*ALL*/, },
4146 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0C, 0x00/*ALL*/, },
4656 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0C, 0x00/*ALL*/, },
5166 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0C, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/include/
H A Dmdrv_dac_tbl.c564 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0C, 0x00/*ALL*/, },
1074 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0C, 0x00/*ALL*/, },
1588 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0C, 0x00/*ALL*/, },
2098 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0C, 0x00/*ALL*/, },
2608 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0C, 0x00/*ALL*/, },
3118 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0C, 0x00/*ALL*/, },
3632 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0C, 0x00/*ALL*/, },
4146 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0C, 0x00/*ALL*/, },
4656 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0C, 0x00/*ALL*/, },
5166 { DRV_DAC_REG(REG_TC_CLK_GEN_5E_H), 0x0C, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/pnl/
H A Dpnl_tcon_tbl.h560 #define REG_TC_CLK_GEN_5E_H (REG_TC_CLK_GEN_BASE + 0xBD) macro
H A Dmdrv_dac_tbl.h935 #define REG_TC_CLK_GEN_5E_H (REG_TC_CLK_GEN_BASE + 0xBD) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/pnl/
H A Dpnl_tcon_tbl.h558 #define REG_TC_CLK_GEN_5E_H (REG_TC_CLK_GEN_BASE + 0xBD) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/pnl/
H A Dpnl_tcon_tbl.h560 #define REG_TC_CLK_GEN_5E_H (REG_TC_CLK_GEN_BASE + 0xBD) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/pnl/
H A Dpnl_tcon_tbl.h558 #define REG_TC_CLK_GEN_5E_H (REG_TC_CLK_GEN_BASE + 0xBD) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/pnl/
H A Dpnl_tcon_tbl.h560 #define REG_TC_CLK_GEN_5E_H (REG_TC_CLK_GEN_BASE + 0xBD) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/pnl/
H A Dpnl_tcon_tbl.h558 #define REG_TC_CLK_GEN_5E_H (REG_TC_CLK_GEN_BASE + 0xBD) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/pnl/
H A Dpnl_tcon_tbl.h560 #define REG_TC_CLK_GEN_5E_H (REG_TC_CLK_GEN_BASE + 0xBD) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/pnl/
H A Dpnl_tcon_tbl.h560 #define REG_TC_CLK_GEN_5E_H (REG_TC_CLK_GEN_BASE + 0xBD) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/pnl/
H A Dpnl_tcon_tbl.h560 #define REG_TC_CLK_GEN_5E_H (REG_TC_CLK_GEN_BASE + 0xBD) macro
H A Dmdrv_dac_tbl.h935 #define REG_TC_CLK_GEN_5E_H (REG_TC_CLK_GEN_BASE + 0xBD) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/pnl/
H A Dpnl_tcon_tbl.h560 #define REG_TC_CLK_GEN_5E_H (REG_TC_CLK_GEN_BASE + 0xBD) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/pnl/
H A Dpnl_tcon_tbl.h560 #define REG_TC_CLK_GEN_5E_H (REG_TC_CLK_GEN_BASE + 0xBD) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/pnl/
H A Dpnl_tcon_tbl.h560 #define REG_TC_CLK_GEN_5E_H (REG_TC_CLK_GEN_BASE + 0xBD) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/pnl/
H A Dpnl_tcon_tbl.h560 #define REG_TC_CLK_GEN_5E_H (REG_TC_CLK_GEN_BASE + 0xBD) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/pnl/
H A Dpnl_tcon_tbl.h558 #define REG_TC_CLK_GEN_5E_H (REG_TC_CLK_GEN_BASE + 0xBD) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/pnl/
H A Dpnl_tcon_tbl.h560 #define REG_TC_CLK_GEN_5E_H (REG_TC_CLK_GEN_BASE + 0xBD) macro

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