Home
last modified time | relevance | path

Searched refs:REG_TC_CLK_GEN_5A_L (Results 1 – 25 of 38) sorted by relevance

12

/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/
H A Dhal_dac_tbl.c119 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1D, 0x0C/*ALL*/, },
654 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1D, 0x0C/*ALL*/, },
1185 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1D, 0x0C/*ALL*/, },
1720 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1D, 0x0C/*ALL*/, },
2251 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1D, 0x08/*ALL*/, },
2782 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1D, 0x08/*ALL*/, },
3313 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1D, 0x04/*ALL*/, },
3848 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1D, 0x04/*ALL*/, },
4383 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1D, 0x04/*ALL*/, },
4914 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1D, 0x04/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/
H A Dhal_dac_tbl.c119 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1D, 0x0C/*ALL*/, },
648 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1D, 0x0C/*ALL*/, },
1173 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1D, 0x0C/*ALL*/, },
1702 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1D, 0x0C/*ALL*/, },
2227 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1D, 0x08/*ALL*/, },
2752 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1D, 0x08/*ALL*/, },
3277 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1D, 0x04/*ALL*/, },
3806 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1D, 0x04/*ALL*/, },
4335 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1D, 0x04/*ALL*/, },
4860 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1D, 0x04/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/
H A Dhal_dac_tbl.c119 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1D, 0x0C/*ALL*/, },
654 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1D, 0x0C/*ALL*/, },
1185 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1D, 0x0C/*ALL*/, },
1720 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1D, 0x0C/*ALL*/, },
2251 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1D, 0x0C/*ALL*/, },
2782 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1D, 0x0C/*ALL*/, },
3313 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1D, 0x0C/*ALL*/, },
3848 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1D, 0x0C/*ALL*/, },
4383 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1D, 0x0C/*ALL*/, },
4913 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1D, 0x0C/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/include/
H A Dmdrv_dac_tbl.c119 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1C, 0x0C/*ALL*/, },
633 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1C, 0x0C/*ALL*/, },
1143 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1C, 0x0C/*ALL*/, },
1657 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1C, 0x0C/*ALL*/, },
2167 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1C, 0x08/*ALL*/, },
2677 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1C, 0x08/*ALL*/, },
3187 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1C, 0x04/*ALL*/, },
3701 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1C, 0x04/*ALL*/, },
4215 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1C, 0x04/*ALL*/, },
4725 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1C, 0x04/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/include/
H A Dmdrv_dac_tbl.c119 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1C, 0x0C/*ALL*/, },
633 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1C, 0x0C/*ALL*/, },
1143 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1C, 0x0C/*ALL*/, },
1657 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1C, 0x0C/*ALL*/, },
2167 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1C, 0x08/*ALL*/, },
2677 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1C, 0x08/*ALL*/, },
3187 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1C, 0x04/*ALL*/, },
3701 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1C, 0x04/*ALL*/, },
4215 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1C, 0x04/*ALL*/, },
4725 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1C, 0x04/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/
H A Dhal_dac_tbl.c119 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1D, 0x0C/*ALL*/, },
648 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1D, 0x0C/*ALL*/, },
1173 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1D, 0x0C/*ALL*/, },
1702 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1D, 0x0C/*ALL*/, },
2227 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1D, 0x08/*ALL*/, },
2752 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1D, 0x08/*ALL*/, },
3277 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1D, 0x04/*ALL*/, },
3806 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1D, 0x04/*ALL*/, },
4335 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1D, 0x04/*ALL*/, },
4860 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1D, 0x04/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/include/
H A Dmdrv_dac_tbl.c119 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1C, 0x0C/*ALL*/, },
633 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1C, 0x0C/*ALL*/, },
1143 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1C, 0x0C/*ALL*/, },
1657 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1C, 0x0C/*ALL*/, },
2167 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1C, 0x08/*ALL*/, },
2677 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1C, 0x08/*ALL*/, },
3187 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1C, 0x04/*ALL*/, },
3701 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1C, 0x04/*ALL*/, },
4215 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1C, 0x04/*ALL*/, },
4725 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1C, 0x04/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/include/
H A Dmdrv_dac_tbl.c119 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1C, 0x0C/*ALL*/, },
633 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1C, 0x0C/*ALL*/, },
1143 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1C, 0x0C/*ALL*/, },
1657 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1C, 0x0C/*ALL*/, },
2167 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1C, 0x08/*ALL*/, },
2677 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1C, 0x08/*ALL*/, },
3187 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1C, 0x04/*ALL*/, },
3701 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1C, 0x04/*ALL*/, },
4215 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1C, 0x04/*ALL*/, },
4725 { DRV_DAC_REG(REG_TC_CLK_GEN_5A_L), 0x1C, 0x04/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/pnl/
H A Dpnl_tcon_tbl.h551 #define REG_TC_CLK_GEN_5A_L (REG_TC_CLK_GEN_BASE + 0xB4) macro
H A Dmdrv_dac_tbl.h926 #define REG_TC_CLK_GEN_5A_L (REG_TC_CLK_GEN_BASE + 0xB4) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/pnl/
H A Dpnl_tcon_tbl.h549 #define REG_TC_CLK_GEN_5A_L (REG_TC_CLK_GEN_BASE + 0xB4) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/pnl/
H A Dpnl_tcon_tbl.h551 #define REG_TC_CLK_GEN_5A_L (REG_TC_CLK_GEN_BASE + 0xB4) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/pnl/
H A Dpnl_tcon_tbl.h549 #define REG_TC_CLK_GEN_5A_L (REG_TC_CLK_GEN_BASE + 0xB4) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/pnl/
H A Dpnl_tcon_tbl.h551 #define REG_TC_CLK_GEN_5A_L (REG_TC_CLK_GEN_BASE + 0xB4) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/pnl/
H A Dpnl_tcon_tbl.h549 #define REG_TC_CLK_GEN_5A_L (REG_TC_CLK_GEN_BASE + 0xB4) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/pnl/
H A Dpnl_tcon_tbl.h551 #define REG_TC_CLK_GEN_5A_L (REG_TC_CLK_GEN_BASE + 0xB4) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/pnl/
H A Dpnl_tcon_tbl.h551 #define REG_TC_CLK_GEN_5A_L (REG_TC_CLK_GEN_BASE + 0xB4) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/pnl/
H A Dpnl_tcon_tbl.h551 #define REG_TC_CLK_GEN_5A_L (REG_TC_CLK_GEN_BASE + 0xB4) macro
H A Dmdrv_dac_tbl.h926 #define REG_TC_CLK_GEN_5A_L (REG_TC_CLK_GEN_BASE + 0xB4) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/pnl/
H A Dpnl_tcon_tbl.h551 #define REG_TC_CLK_GEN_5A_L (REG_TC_CLK_GEN_BASE + 0xB4) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/pnl/
H A Dpnl_tcon_tbl.h551 #define REG_TC_CLK_GEN_5A_L (REG_TC_CLK_GEN_BASE + 0xB4) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/pnl/
H A Dpnl_tcon_tbl.h551 #define REG_TC_CLK_GEN_5A_L (REG_TC_CLK_GEN_BASE + 0xB4) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/pnl/
H A Dpnl_tcon_tbl.h551 #define REG_TC_CLK_GEN_5A_L (REG_TC_CLK_GEN_BASE + 0xB4) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/pnl/
H A Dpnl_tcon_tbl.h549 #define REG_TC_CLK_GEN_5A_L (REG_TC_CLK_GEN_BASE + 0xB4) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/pnl/
H A Dpnl_tcon_tbl.h551 #define REG_TC_CLK_GEN_5A_L (REG_TC_CLK_GEN_BASE + 0xB4) macro

12