Home
last modified time | relevance | path

Searched refs:REG_TC_CLK_GEN_58_L (Results 1 – 25 of 38) sorted by relevance

12

/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/
H A Dhal_dac_tbl.c117 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x0C/*ALL*/, },
652 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x0C/*ALL*/, },
1183 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x0C/*ALL*/, },
1718 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x0C/*ALL*/, },
2249 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x08/*ALL*/, },
2780 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x08/*ALL*/, },
3311 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x08/*ALL*/, },
3846 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x08/*ALL*/, },
4381 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x04/*ALL*/, },
4912 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x04/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/
H A Dhal_dac_tbl.c117 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x0C/*ALL*/, },
646 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x0C/*ALL*/, },
1171 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x0C/*ALL*/, },
1700 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x0C/*ALL*/, },
2225 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x08/*ALL*/, },
2750 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x08/*ALL*/, },
3275 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x08/*ALL*/, },
3804 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x08/*ALL*/, },
4333 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x04/*ALL*/, },
4858 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x04/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/
H A Dhal_dac_tbl.c117 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x0C/*ALL*/, },
652 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x0C/*ALL*/, },
1183 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x0C/*ALL*/, },
1718 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x0C/*ALL*/, },
2249 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x08/*ALL*/, },
2780 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x08/*ALL*/, },
3311 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x08/*ALL*/, },
3846 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x08/*ALL*/, },
4381 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x04/*ALL*/, },
4919 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x04/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/include/
H A Dmdrv_dac_tbl.c117 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x0C/*ALL*/, },
631 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x0C/*ALL*/, },
1141 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x0C/*ALL*/, },
1655 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x0C/*ALL*/, },
2165 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x08/*ALL*/, },
2675 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x08/*ALL*/, },
3185 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x08/*ALL*/, },
3699 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x08/*ALL*/, },
4213 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x04/*ALL*/, },
4723 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x04/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/include/
H A Dmdrv_dac_tbl.c117 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x0C/*ALL*/, },
631 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x0C/*ALL*/, },
1141 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x0C/*ALL*/, },
1655 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x0C/*ALL*/, },
2165 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x08/*ALL*/, },
2675 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x08/*ALL*/, },
3185 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x08/*ALL*/, },
3699 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x08/*ALL*/, },
4213 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x04/*ALL*/, },
4723 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x04/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/
H A Dhal_dac_tbl.c117 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x0C/*ALL*/, },
646 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x0C/*ALL*/, },
1171 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x0C/*ALL*/, },
1700 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x0C/*ALL*/, },
2225 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x08/*ALL*/, },
2750 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x08/*ALL*/, },
3275 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x08/*ALL*/, },
3804 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x08/*ALL*/, },
4333 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x04/*ALL*/, },
4858 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x04/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/include/
H A Dmdrv_dac_tbl.c117 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x0C/*ALL*/, },
631 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x0C/*ALL*/, },
1141 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x0C/*ALL*/, },
1655 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x0C/*ALL*/, },
2165 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x08/*ALL*/, },
2675 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x08/*ALL*/, },
3185 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x08/*ALL*/, },
3699 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x08/*ALL*/, },
4213 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x04/*ALL*/, },
4723 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x04/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/include/
H A Dmdrv_dac_tbl.c117 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x0C/*ALL*/, },
631 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x0C/*ALL*/, },
1141 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x0C/*ALL*/, },
1655 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x0C/*ALL*/, },
2165 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x08/*ALL*/, },
2675 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x08/*ALL*/, },
3185 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x08/*ALL*/, },
3699 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x08/*ALL*/, },
4213 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x04/*ALL*/, },
4723 { DRV_DAC_REG(REG_TC_CLK_GEN_58_L), 0x0C, 0x04/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/pnl/
H A Dpnl_tcon_tbl.h547 #define REG_TC_CLK_GEN_58_L (REG_TC_CLK_GEN_BASE + 0xB0) macro
H A Dmdrv_dac_tbl.h922 #define REG_TC_CLK_GEN_58_L (REG_TC_CLK_GEN_BASE + 0xB0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/pnl/
H A Dpnl_tcon_tbl.h545 #define REG_TC_CLK_GEN_58_L (REG_TC_CLK_GEN_BASE + 0xB0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/pnl/
H A Dpnl_tcon_tbl.h547 #define REG_TC_CLK_GEN_58_L (REG_TC_CLK_GEN_BASE + 0xB0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/pnl/
H A Dpnl_tcon_tbl.h545 #define REG_TC_CLK_GEN_58_L (REG_TC_CLK_GEN_BASE + 0xB0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/pnl/
H A Dpnl_tcon_tbl.h547 #define REG_TC_CLK_GEN_58_L (REG_TC_CLK_GEN_BASE + 0xB0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/pnl/
H A Dpnl_tcon_tbl.h545 #define REG_TC_CLK_GEN_58_L (REG_TC_CLK_GEN_BASE + 0xB0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/pnl/
H A Dpnl_tcon_tbl.h547 #define REG_TC_CLK_GEN_58_L (REG_TC_CLK_GEN_BASE + 0xB0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/pnl/
H A Dpnl_tcon_tbl.h547 #define REG_TC_CLK_GEN_58_L (REG_TC_CLK_GEN_BASE + 0xB0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/pnl/
H A Dpnl_tcon_tbl.h547 #define REG_TC_CLK_GEN_58_L (REG_TC_CLK_GEN_BASE + 0xB0) macro
H A Dmdrv_dac_tbl.h922 #define REG_TC_CLK_GEN_58_L (REG_TC_CLK_GEN_BASE + 0xB0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/pnl/
H A Dpnl_tcon_tbl.h547 #define REG_TC_CLK_GEN_58_L (REG_TC_CLK_GEN_BASE + 0xB0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/pnl/
H A Dpnl_tcon_tbl.h547 #define REG_TC_CLK_GEN_58_L (REG_TC_CLK_GEN_BASE + 0xB0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/pnl/
H A Dpnl_tcon_tbl.h547 #define REG_TC_CLK_GEN_58_L (REG_TC_CLK_GEN_BASE + 0xB0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/pnl/
H A Dpnl_tcon_tbl.h547 #define REG_TC_CLK_GEN_58_L (REG_TC_CLK_GEN_BASE + 0xB0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/pnl/
H A Dpnl_tcon_tbl.h545 #define REG_TC_CLK_GEN_58_L (REG_TC_CLK_GEN_BASE + 0xB0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/pnl/
H A Dpnl_tcon_tbl.h547 #define REG_TC_CLK_GEN_58_L (REG_TC_CLK_GEN_BASE + 0xB0) macro

12