Home
last modified time | relevance | path

Searched refs:REG_TC_CLK_GEN_54_L (Results 1 – 25 of 38) sorted by relevance

12

/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/
H A Dhal_dac_tbl.c115 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x01/*ALL*/, },
650 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x00/*ALL*/, },
1181 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x01/*ALL*/, },
1716 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x00/*ALL*/, },
2247 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x00/*ALL*/, },
2778 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x00/*ALL*/, },
3309 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x01/*ALL*/, },
3844 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x01/*ALL*/, },
4379 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x00/*ALL*/, },
4910 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/
H A Dhal_dac_tbl.c115 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x01/*ALL*/, },
644 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x00/*ALL*/, },
1169 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x01/*ALL*/, },
1698 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x00/*ALL*/, },
2223 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x00/*ALL*/, },
2748 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x00/*ALL*/, },
3273 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x01/*ALL*/, },
3802 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x01/*ALL*/, },
4331 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x00/*ALL*/, },
4856 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/
H A Dhal_dac_tbl.c115 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x01/*ALL*/, },
650 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x00/*ALL*/, },
1181 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x01/*ALL*/, },
1716 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x00/*ALL*/, },
2247 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x00/*ALL*/, },
2778 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x00/*ALL*/, },
3309 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x01/*ALL*/, },
3844 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x01/*ALL*/, },
4379 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x00/*ALL*/, },
4910 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/
H A Dhal_dac_tbl.c115 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x01/*ALL*/, },
644 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x00/*ALL*/, },
1169 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x01/*ALL*/, },
1698 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x00/*ALL*/, },
2223 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x00/*ALL*/, },
2748 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x00/*ALL*/, },
3273 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x01/*ALL*/, },
3802 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x01/*ALL*/, },
4331 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x00/*ALL*/, },
4856 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/include/
H A Dmdrv_dac_tbl.c115 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x01/*ALL*/, },
629 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x00/*ALL*/, },
1139 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x01/*ALL*/, },
1653 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x00/*ALL*/, },
2163 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x00/*ALL*/, },
2673 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x00/*ALL*/, },
3183 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x01/*ALL*/, },
3697 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x01/*ALL*/, },
4211 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x00/*ALL*/, },
4721 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/include/
H A Dmdrv_dac_tbl.c115 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x01/*ALL*/, },
629 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x00/*ALL*/, },
1139 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x01/*ALL*/, },
1653 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x00/*ALL*/, },
2163 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x00/*ALL*/, },
2673 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x00/*ALL*/, },
3183 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x01/*ALL*/, },
3697 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x01/*ALL*/, },
4211 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x00/*ALL*/, },
4721 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/include/
H A Dmdrv_dac_tbl.c115 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x01/*ALL*/, },
629 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x00/*ALL*/, },
1139 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x01/*ALL*/, },
1653 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x00/*ALL*/, },
2163 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x00/*ALL*/, },
2673 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x00/*ALL*/, },
3183 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x01/*ALL*/, },
3697 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x01/*ALL*/, },
4211 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x00/*ALL*/, },
4721 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/include/
H A Dmdrv_dac_tbl.c115 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x01/*ALL*/, },
629 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x00/*ALL*/, },
1139 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x01/*ALL*/, },
1653 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x00/*ALL*/, },
2163 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x00/*ALL*/, },
2673 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x00/*ALL*/, },
3183 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x01/*ALL*/, },
3697 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x01/*ALL*/, },
4211 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x00/*ALL*/, },
4721 { DRV_DAC_REG(REG_TC_CLK_GEN_54_L), 0x01, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/pnl/
H A Dpnl_tcon_tbl.h539 #define REG_TC_CLK_GEN_54_L (REG_TC_CLK_GEN_BASE + 0xA8) macro
H A Dmdrv_dac_tbl.h914 #define REG_TC_CLK_GEN_54_L (REG_TC_CLK_GEN_BASE + 0xA8) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/pnl/
H A Dpnl_tcon_tbl.h537 #define REG_TC_CLK_GEN_54_L (REG_TC_CLK_GEN_BASE + 0xA8) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/pnl/
H A Dpnl_tcon_tbl.h539 #define REG_TC_CLK_GEN_54_L (REG_TC_CLK_GEN_BASE + 0xA8) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/pnl/
H A Dpnl_tcon_tbl.h537 #define REG_TC_CLK_GEN_54_L (REG_TC_CLK_GEN_BASE + 0xA8) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/pnl/
H A Dpnl_tcon_tbl.h539 #define REG_TC_CLK_GEN_54_L (REG_TC_CLK_GEN_BASE + 0xA8) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/pnl/
H A Dpnl_tcon_tbl.h537 #define REG_TC_CLK_GEN_54_L (REG_TC_CLK_GEN_BASE + 0xA8) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/pnl/
H A Dpnl_tcon_tbl.h539 #define REG_TC_CLK_GEN_54_L (REG_TC_CLK_GEN_BASE + 0xA8) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/pnl/
H A Dpnl_tcon_tbl.h539 #define REG_TC_CLK_GEN_54_L (REG_TC_CLK_GEN_BASE + 0xA8) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/pnl/
H A Dpnl_tcon_tbl.h539 #define REG_TC_CLK_GEN_54_L (REG_TC_CLK_GEN_BASE + 0xA8) macro
H A Dmdrv_dac_tbl.h914 #define REG_TC_CLK_GEN_54_L (REG_TC_CLK_GEN_BASE + 0xA8) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/pnl/
H A Dpnl_tcon_tbl.h539 #define REG_TC_CLK_GEN_54_L (REG_TC_CLK_GEN_BASE + 0xA8) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/pnl/
H A Dpnl_tcon_tbl.h539 #define REG_TC_CLK_GEN_54_L (REG_TC_CLK_GEN_BASE + 0xA8) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/pnl/
H A Dpnl_tcon_tbl.h539 #define REG_TC_CLK_GEN_54_L (REG_TC_CLK_GEN_BASE + 0xA8) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/pnl/
H A Dpnl_tcon_tbl.h539 #define REG_TC_CLK_GEN_54_L (REG_TC_CLK_GEN_BASE + 0xA8) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/pnl/
H A Dpnl_tcon_tbl.h537 #define REG_TC_CLK_GEN_54_L (REG_TC_CLK_GEN_BASE + 0xA8) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/pnl/
H A Dpnl_tcon_tbl.h539 #define REG_TC_CLK_GEN_54_L (REG_TC_CLK_GEN_BASE + 0xA8) macro

12