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Searched refs:REG_TC_CHIP_TOP_2B_L (Results 1 – 25 of 38) sorted by relevance

12

/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/
H A Dhal_dac_tbl.c134 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
669 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
1200 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
1735 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
2266 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
2797 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
3328 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
3863 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
4398 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
4930 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/
H A Dhal_dac_tbl.c134 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
663 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
1188 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
1717 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
2242 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
2767 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
3292 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
3821 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
4350 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
4875 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/
H A Dhal_dac_tbl.c134 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
669 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
1200 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
1735 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
2266 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
2797 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
3328 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
3863 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
4398 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
4929 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/include/
H A Dmdrv_dac_tbl.c130 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
644 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
1154 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
1668 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
2178 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
2688 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
3198 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
3712 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
4226 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
4736 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/include/
H A Dmdrv_dac_tbl.c130 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
644 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
1154 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
1668 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
2178 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
2688 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
3198 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
3712 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
4226 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
4736 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/
H A Dhal_dac_tbl.c134 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
663 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
1188 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
1717 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
2242 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
2767 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
3292 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
3821 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
4350 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
4875 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/include/
H A Dmdrv_dac_tbl.c130 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
644 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
1154 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
1668 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
2178 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
2688 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
3198 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
3712 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
4226 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
4736 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/include/
H A Dmdrv_dac_tbl.c130 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
644 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
1154 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
1668 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
2178 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
2688 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
3198 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
3712 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
4226 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
4736 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_L), 0x00, 0x38/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/pnl/
H A Dpnl_tcon_tbl.h714 #define REG_TC_CHIP_TOP_2B_L (REG_TC_CHIP_TOP_BASE + 0x56) macro
H A Dmdrv_dac_tbl.h1089 #define REG_TC_CHIP_TOP_2B_L (REG_TC_CHIP_TOP_BASE + 0x56) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/pnl/
H A Dpnl_tcon_tbl.h712 #define REG_TC_CHIP_TOP_2B_L (REG_TC_CHIP_TOP_BASE + 0x56) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/pnl/
H A Dpnl_tcon_tbl.h714 #define REG_TC_CHIP_TOP_2B_L (REG_TC_CHIP_TOP_BASE + 0x56) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/pnl/
H A Dpnl_tcon_tbl.h712 #define REG_TC_CHIP_TOP_2B_L (REG_TC_CHIP_TOP_BASE + 0x56) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/pnl/
H A Dpnl_tcon_tbl.h714 #define REG_TC_CHIP_TOP_2B_L (REG_TC_CHIP_TOP_BASE + 0x56) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/pnl/
H A Dpnl_tcon_tbl.h712 #define REG_TC_CHIP_TOP_2B_L (REG_TC_CHIP_TOP_BASE + 0x56) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/pnl/
H A Dpnl_tcon_tbl.h714 #define REG_TC_CHIP_TOP_2B_L (REG_TC_CHIP_TOP_BASE + 0x56) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/pnl/
H A Dpnl_tcon_tbl.h714 #define REG_TC_CHIP_TOP_2B_L (REG_TC_CHIP_TOP_BASE + 0x56) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/pnl/
H A Dpnl_tcon_tbl.h714 #define REG_TC_CHIP_TOP_2B_L (REG_TC_CHIP_TOP_BASE + 0x56) macro
H A Dmdrv_dac_tbl.h1089 #define REG_TC_CHIP_TOP_2B_L (REG_TC_CHIP_TOP_BASE + 0x56) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/pnl/
H A Dpnl_tcon_tbl.h714 #define REG_TC_CHIP_TOP_2B_L (REG_TC_CHIP_TOP_BASE + 0x56) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/pnl/
H A Dpnl_tcon_tbl.h714 #define REG_TC_CHIP_TOP_2B_L (REG_TC_CHIP_TOP_BASE + 0x56) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/pnl/
H A Dpnl_tcon_tbl.h714 #define REG_TC_CHIP_TOP_2B_L (REG_TC_CHIP_TOP_BASE + 0x56) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/pnl/
H A Dpnl_tcon_tbl.h714 #define REG_TC_CHIP_TOP_2B_L (REG_TC_CHIP_TOP_BASE + 0x56) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/pnl/
H A Dpnl_tcon_tbl.h712 #define REG_TC_CHIP_TOP_2B_L (REG_TC_CHIP_TOP_BASE + 0x56) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/pnl/
H A Dpnl_tcon_tbl.h714 #define REG_TC_CHIP_TOP_2B_L (REG_TC_CHIP_TOP_BASE + 0x56) macro

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