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Searched refs:REG_TC_CHIP_TOP_2B_H (Results 1 – 25 of 38) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/
H A Dhal_dac_tbl.c135 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
670 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
1201 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
1736 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
2267 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
2798 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
3329 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
3864 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
4399 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
4931 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/
H A Dhal_dac_tbl.c135 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
664 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
1189 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
1718 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
2243 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
2768 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
3293 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
3822 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
4351 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
4876 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/
H A Dhal_dac_tbl.c135 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
670 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
1201 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
1736 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
2267 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
2798 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
3329 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
3864 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
4399 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
4930 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/include/
H A Dmdrv_dac_tbl.c131 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
645 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
1155 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
1669 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
2179 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
2689 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
3199 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
3713 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
4227 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
4737 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/include/
H A Dmdrv_dac_tbl.c131 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
645 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
1155 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
1669 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
2179 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
2689 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
3199 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
3713 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
4227 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
4737 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/
H A Dhal_dac_tbl.c135 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
664 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
1189 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
1718 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
2243 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
2768 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
3293 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
3822 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
4351 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
4876 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/include/
H A Dmdrv_dac_tbl.c131 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
645 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
1155 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
1669 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
2179 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
2689 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
3199 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
3713 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
4227 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
4737 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/include/
H A Dmdrv_dac_tbl.c131 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
645 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
1155 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
1669 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
2179 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
2689 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
3199 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
3713 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
4227 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
4737 { DRV_DAC_REG(REG_TC_CHIP_TOP_2B_H), 0x00, 0x02/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/pnl/
H A Dpnl_tcon_tbl.h715 #define REG_TC_CHIP_TOP_2B_H (REG_TC_CHIP_TOP_BASE + 0x57) macro
H A Dmdrv_dac_tbl.h1090 #define REG_TC_CHIP_TOP_2B_H (REG_TC_CHIP_TOP_BASE + 0x57) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/pnl/
H A Dpnl_tcon_tbl.h713 #define REG_TC_CHIP_TOP_2B_H (REG_TC_CHIP_TOP_BASE + 0x57) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/pnl/
H A Dpnl_tcon_tbl.h715 #define REG_TC_CHIP_TOP_2B_H (REG_TC_CHIP_TOP_BASE + 0x57) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/pnl/
H A Dpnl_tcon_tbl.h713 #define REG_TC_CHIP_TOP_2B_H (REG_TC_CHIP_TOP_BASE + 0x57) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/pnl/
H A Dpnl_tcon_tbl.h715 #define REG_TC_CHIP_TOP_2B_H (REG_TC_CHIP_TOP_BASE + 0x57) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/pnl/
H A Dpnl_tcon_tbl.h713 #define REG_TC_CHIP_TOP_2B_H (REG_TC_CHIP_TOP_BASE + 0x57) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/pnl/
H A Dpnl_tcon_tbl.h715 #define REG_TC_CHIP_TOP_2B_H (REG_TC_CHIP_TOP_BASE + 0x57) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/pnl/
H A Dpnl_tcon_tbl.h715 #define REG_TC_CHIP_TOP_2B_H (REG_TC_CHIP_TOP_BASE + 0x57) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/pnl/
H A Dpnl_tcon_tbl.h715 #define REG_TC_CHIP_TOP_2B_H (REG_TC_CHIP_TOP_BASE + 0x57) macro
H A Dmdrv_dac_tbl.h1090 #define REG_TC_CHIP_TOP_2B_H (REG_TC_CHIP_TOP_BASE + 0x57) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/pnl/
H A Dpnl_tcon_tbl.h715 #define REG_TC_CHIP_TOP_2B_H (REG_TC_CHIP_TOP_BASE + 0x57) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/pnl/
H A Dpnl_tcon_tbl.h715 #define REG_TC_CHIP_TOP_2B_H (REG_TC_CHIP_TOP_BASE + 0x57) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/pnl/
H A Dpnl_tcon_tbl.h715 #define REG_TC_CHIP_TOP_2B_H (REG_TC_CHIP_TOP_BASE + 0x57) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/pnl/
H A Dpnl_tcon_tbl.h715 #define REG_TC_CHIP_TOP_2B_H (REG_TC_CHIP_TOP_BASE + 0x57) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/pnl/
H A Dpnl_tcon_tbl.h713 #define REG_TC_CHIP_TOP_2B_H (REG_TC_CHIP_TOP_BASE + 0x57) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/pnl/
H A Dpnl_tcon_tbl.h715 #define REG_TC_CHIP_TOP_2B_H (REG_TC_CHIP_TOP_BASE + 0x57) macro

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