Searched refs:REG_SC_BK6C_40_L (Results 1 – 5 of 5) sorted by relevance
| /utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/ |
| H A D | mhal_dip.c | 1435 DIP_W2BYTEMSK(0, REG_SC_BK6C_40_L, BIT(7), BIT(7)); //Disable clock in HAL_XC_DIP_Init() 1551 DIP_W2BYTEMSK(0, REG_SC_BK6C_40_L, 0, BIT(7)); //Enable clock in HAL_XC_DIP_EnableCaptureStream() 1741 SC_W2BYTEMSK(0, REG_SC_BK6C_40_L, BIT(7), BIT(7)); //Disable clock in HAL_XC_DIP_ClearIntr() 1838 DIP_W2BYTEMSK(0, REG_SC_BK6C_40_L, 0, BIT(7)); //Enable clock in HAL_XC_DIP_CpatureOneFrame2() 4250 DIP_W2BYTEMSK(0, REG_SC_BK6C_40_L, BIT(7), BIT(7)); //Disable clock in HAL_XC_DIP_InterruptDetach()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/ |
| H A D | mhal_dip.c | 734 SC_W2BYTEMSK(0, REG_SC_BK6C_40_L, 0, BIT(7)); //Enable clock in HAL_XC_DIP_Init()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/ |
| H A D | mhal_dip.c | 736 SC_W2BYTEMSK(0, REG_SC_BK6C_40_L, 0, BIT(7)); //Enable clock in HAL_XC_DIP_Init()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/ |
| H A D | mhal_dip.c | 1383 DIP_W2BYTEMSK(0, REG_SC_BK6C_40_L, 0, BIT(7)); //Enable clock in HAL_XC_DIP_Init()
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| /utopia/UTPA2-700.0.x/modules/xc/drv/xc/include/ |
| H A D | hwreg_sc.h | 18170 #define REG_SC_BK6C_40_L _PK_L_(0x6C, 0x40) macro
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