| /utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/ |
| H A D | mhal_dip.c | 1264 DIP_W2BYTEMSK(0, REG_SC_BK3B_40_L,u16Ratio,BMASK(5:0)); in HAL_XC_DIP_SetFRC()
1268 DIP_W2BYTEMSK(0, REG_SC_BK3B_40_L,0,BMASK(5:0)); in HAL_XC_DIP_SetFRC()
1273 DIP_W2BYTEMSK(0, REG_SC_BK3B_40_L,0,BMASK(5:0)); in HAL_XC_DIP_SetFRC()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/ |
| H A D | mhal_dip.c | 1316 DIP_W2BYTEMSK(0, REG_SC_BK3B_40_L,u16Ratio,BMASK(5:0)); in HAL_XC_DIP_SetFRC()
1320 DIP_W2BYTEMSK(0, REG_SC_BK3B_40_L,0,BMASK(5:0)); in HAL_XC_DIP_SetFRC()
1325 DIP_W2BYTEMSK(0, REG_SC_BK3B_40_L,0,BMASK(5:0)); in HAL_XC_DIP_SetFRC()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/ |
| H A D | mhal_dip.c | 1326 SC_W4BYTE(0, REG_SC_BK3B_40_L, u32BufEnd); // input address0 in HAL_XC_DIP_SetBase1()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/ |
| H A D | mhal_dip.c | 1337 SC_W4BYTE(0, REG_SC_BK3B_40_L, u32BufEnd); // input address0 in HAL_XC_DIP_SetBase1()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/ |
| H A D | mhal_dip.c | 1843 SC_W4BYTE(0, REG_SC_BK3B_40_L, u64BufEnd); // input address0 in HAL_XC_DIP_SetBase1()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/ |
| H A D | mhal_dip.c | 1823 SC_W4BYTE(0, REG_SC_BK3B_40_L, u64BufEnd); // input address0 in HAL_XC_DIP_SetBase1()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/ |
| H A D | mhal_dip.c | 1918 SC_W4BYTE(0, REG_SC_BK3B_40_L, u64BufEnd); // input address0 in HAL_XC_DIP_SetBase1()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/ |
| H A D | mhal_dip.c | 2098 SC_W4BYTE(0, REG_SC_BK3B_40_L, u64BufEnd); // input address0 in HAL_XC_DIP_SetBase1()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/ |
| H A D | mhal_dip.c | 2224 SC_W4BYTE(0, REG_SC_BK3B_40_L, u64BufEnd); // input address0 in HAL_XC_DIP_SetBase1()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/ |
| H A D | mhal_dip.c | 2226 SC_W4BYTE(0, REG_SC_BK3B_40_L, u64BufEnd); // input address0 in HAL_XC_DIP_SetBase1()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/ |
| H A D | mhal_dip.c | 1972 SC_W4BYTE(0, REG_SC_BK3B_40_L, u64_result); // input address0 in HAL_XC_DIP_SetBase1()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/ |
| H A D | mhal_dip.c | 2608 DIP_W4BYTE(0, REG_SC_BK3B_40_L, u64_result); // input address0 in HAL_XC_DIP_SetBase1()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/ |
| H A D | mhal_dip.c | 2563 DIP_W4BYTE(0, REG_SC_BK3B_40_L, u64_result); // input address0 in HAL_XC_DIP_SetBase1()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/ |
| H A D | mhal_dip.c | 2609 DIP_W4BYTE(0, REG_SC_BK3B_40_L, u64_result); // input address0 in HAL_XC_DIP_SetBase1()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/ |
| H A D | mhal_dip.c | 2563 DIP_W4BYTE(0, REG_SC_BK3B_40_L, u64_result); // input address0 in HAL_XC_DIP_SetBase1()
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| /utopia/UTPA2-700.0.x/modules/xc/drv/xc/include/ |
| H A D | hwreg_sc.h | 11520 #define REG_SC_BK3B_40_L _PK_L_(0x3B, 0x40) macro
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