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Searched refs:REG_SC_BK3B_04_L (Results 1 – 14 of 14) sorted by relevance

/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/
H A Dmhal_dip.c1188 DIP_W4BYTE(0, REG_SC_BK3B_04_L, pDBreg->u32H_PreScalingRatio); // H pre-scaling in Hal_SC_DWIN_sw_db()
1217 pDBreg->u32H_PreScalingRatio = DIP_R4BYTE(0, REG_SC_BK3B_04_L,eWindow); in Hal_SC_DWIN_get_sw_db()
3898 *u16V_Scaling_Enable = (DIP_R4BYTE(0, REG_SC_BK3B_04_L,eWindow) & BIT(31)) >> 31; in HAL_XC_DIP_Check_Scale()
3899 *u32H_Scaling_Ratio = DIP_R4BYTE(0, REG_SC_BK3B_04_L,eWindow) & BMASK(22:0); in HAL_XC_DIP_Check_Scale()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/
H A Dmhal_dip.c1240 DIP_W4BYTE(0, REG_SC_BK3B_04_L, pDBreg->u32H_PreScalingRatio); // H pre-scaling in Hal_SC_DWIN_sw_db()
1269 pDBreg->u32H_PreScalingRatio = DIP_R4BYTE(0, REG_SC_BK3B_04_L,eWindow); in Hal_SC_DWIN_get_sw_db()
4379 *u16V_Scaling_Enable = (DIP_R4BYTE(0, REG_SC_BK3B_04_L,eWindow) & BIT(31)) >> 31; in HAL_XC_DIP_Check_Scale()
4380 *u32H_Scaling_Ratio = DIP_R4BYTE(0, REG_SC_BK3B_04_L,eWindow) & BMASK(22:0); in HAL_XC_DIP_Check_Scale()
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/
H A Dmhal_dip.c472 SC_W2BYTEMSK(0, REG_SC_BK3B_04_L, BIT(4),BIT(4)); in HAL_XC_DIP_Init()
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/
H A Dmhal_dip.c491 SC_W2BYTEMSK(0, REG_SC_BK3B_04_L, BIT(4),BIT(4)); in HAL_XC_DIP_Init()
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/
H A Dmhal_dip.c644 SC_W2BYTEMSK(0, REG_SC_BK3B_04_L, BIT(4),BIT(4)); in HAL_XC_DIP_Init()
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/
H A Dmhal_dip.c796 SC_W2BYTEMSK(0, REG_SC_BK3B_04_L, BIT(4),BIT(4)); in HAL_XC_DIP_Init()
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/
H A Dmhal_dip.c754 SC_W2BYTEMSK(0, REG_SC_BK3B_04_L, BIT(4),BIT(4)); in HAL_XC_DIP_Init()
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/
H A Dmhal_dip.c756 SC_W2BYTEMSK(0, REG_SC_BK3B_04_L, BIT(4),BIT(4)); in HAL_XC_DIP_Init()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/
H A Dmhal_dip.c677 SC_W2BYTEMSK(0, REG_SC_BK3B_04_L, BIT(4),BIT(4)); in HAL_XC_DIP_Init()
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/
H A Dmhal_dip.c1173 DIP_W2BYTEMSK(0, REG_SC_BK3B_04_L, BIT(4),BIT(4)); in HAL_XC_DIP_Init()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/
H A Dmhal_dip.c1174 DIP_W2BYTEMSK(0, REG_SC_BK3B_04_L, BIT(4),BIT(4)); in HAL_XC_DIP_Init()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/
H A Dmhal_dip.c1174 DIP_W2BYTEMSK(0, REG_SC_BK3B_04_L, BIT(4),BIT(4)); in HAL_XC_DIP_Init()
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/
H A Dmhal_dip.c1174 DIP_W2BYTEMSK(0, REG_SC_BK3B_04_L, BIT(4),BIT(4)); in HAL_XC_DIP_Init()
/utopia/UTPA2-700.0.x/modules/xc/drv/xc/include/
H A Dhwreg_sc.h11400 #define REG_SC_BK3B_04_L _PK_L_(0x3B, 0x04) macro