Searched refs:REG_SC_BK36_40_L (Results 1 – 16 of 16) sorted by relevance
| /utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/ |
| H A D | mhal_dip.c | 1317 SC_W4BYTE(0, REG_SC_BK36_40_L, u32BufEnd); // input address0 in HAL_XC_DIP_SetBase1()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/ |
| H A D | mhal_dip.c | 1328 SC_W4BYTE(0, REG_SC_BK36_40_L, u32BufEnd); // input address0 in HAL_XC_DIP_SetBase1()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/ |
| H A D | mhal_dip.c | 1834 SC_W4BYTE(0, REG_SC_BK36_40_L, u64BufEnd); // input address0 in HAL_XC_DIP_SetBase1()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/ |
| H A D | mhal_dip.c | 1814 SC_W4BYTE(0, REG_SC_BK36_40_L, u64BufEnd); // input address0 in HAL_XC_DIP_SetBase1()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/ |
| H A D | mhal_dip.c | 1909 SC_W4BYTE(0, REG_SC_BK36_40_L, u64BufEnd); // input address0 in HAL_XC_DIP_SetBase1()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/ |
| H A D | mhal_dip.c | 2089 SC_W4BYTE(0, REG_SC_BK36_40_L, u64BufEnd); // input address0 in HAL_XC_DIP_SetBase1()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/ |
| H A D | mhal_dip.c | 2215 SC_W4BYTE(0, REG_SC_BK36_40_L, u64BufEnd); // input address0 in HAL_XC_DIP_SetBase1()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/ |
| H A D | mhal_dip.c | 2217 SC_W4BYTE(0, REG_SC_BK36_40_L, u64BufEnd); // input address0 in HAL_XC_DIP_SetBase1()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/ |
| H A D | mhal_dip.c | 1958 SC_W4BYTE(0, REG_SC_BK36_40_L, u64_result); // input address0 in HAL_XC_DIP_SetBase1()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/ |
| H A D | mhal_dip.c | 2594 DIP_W4BYTE(0, REG_SC_BK36_40_L, u64_result); // input address0 in HAL_XC_DIP_SetBase1()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/ |
| H A D | mhal_dip.c | 2549 DIP_W4BYTE(0, REG_SC_BK36_40_L, u64_result); // input address0 in HAL_XC_DIP_SetBase1()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/ |
| H A D | mhal_dip.c | 2595 DIP_W4BYTE(0, REG_SC_BK36_40_L, u64_result); // input address0 in HAL_XC_DIP_SetBase1()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/ |
| H A D | mhal_dip.c | 2549 DIP_W4BYTE(0, REG_SC_BK36_40_L, u64_result); // input address0 in HAL_XC_DIP_SetBase1()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/ |
| H A D | mhal_dip.c | 2768 DIP_W4BYTE(0, REG_SC_BK36_40_L, u64BufEnd); // input address0 in HAL_XC_DIP_SetBase1()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/ |
| H A D | mhal_dip.c | 2963 DIP_W4BYTE(0, REG_SC_BK36_40_L, u64BufEnd); // input address0 in HAL_XC_DIP_SetBase1()
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| /utopia/UTPA2-700.0.x/modules/xc/drv/xc/include/ |
| H A D | hwreg_sc.h | 11162 #define REG_SC_BK36_40_L _PK_L_(0x36, 0x40) macro
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