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Searched refs:REG_SC_BK36_30_L (Results 1 – 16 of 16) sorted by relevance

/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/
H A Dmhal_dip.c1289 SC_W4BYTE(0, REG_SC_BK36_30_L, u32BufEnd); // input address0 in HAL_XC_DIP_SetBase0()
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/
H A Dmhal_dip.c1300 SC_W4BYTE(0, REG_SC_BK36_30_L, u32BufEnd); // input address0 in HAL_XC_DIP_SetBase0()
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/
H A Dmhal_dip.c1796 SC_W4BYTE(0, REG_SC_BK36_30_L, u64BufEnd); // input address0 in HAL_XC_DIP_SetBase0()
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/
H A Dmhal_dip.c1776 SC_W4BYTE(0, REG_SC_BK36_30_L, u64BufEnd); // input address0 in HAL_XC_DIP_SetBase0()
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/
H A Dmhal_dip.c1871 SC_W4BYTE(0, REG_SC_BK36_30_L, u64BufEnd); // input address0 in HAL_XC_DIP_SetBase0()
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/
H A Dmhal_dip.c2051 SC_W4BYTE(0, REG_SC_BK36_30_L, u64BufEnd); // input address0 in HAL_XC_DIP_SetBase0()
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/
H A Dmhal_dip.c2177 SC_W4BYTE(0, REG_SC_BK36_30_L, u64BufEnd); // input address0 in HAL_XC_DIP_SetBase0()
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/
H A Dmhal_dip.c2179 SC_W4BYTE(0, REG_SC_BK36_30_L, u64BufEnd); // input address0 in HAL_XC_DIP_SetBase0()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/
H A Dmhal_dip.c1904 SC_W4BYTE(0, REG_SC_BK36_30_L, u64_result); // input address0 in HAL_XC_DIP_SetBase0()
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/
H A Dmhal_dip.c2540 DIP_W4BYTE(0, REG_SC_BK36_30_L, u64_result); // input address0 in HAL_XC_DIP_SetBase0()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/
H A Dmhal_dip.c2495 DIP_W4BYTE(0, REG_SC_BK36_30_L, u64_result); // input address0 in HAL_XC_DIP_SetBase0()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/
H A Dmhal_dip.c2541 DIP_W4BYTE(0, REG_SC_BK36_30_L, u64_result); // input address0 in HAL_XC_DIP_SetBase0()
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/
H A Dmhal_dip.c2495 DIP_W4BYTE(0, REG_SC_BK36_30_L, u64_result); // input address0 in HAL_XC_DIP_SetBase0()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/
H A Dmhal_dip.c2739 DIP_W4BYTE(0, REG_SC_BK36_30_L, u64BufEnd); // input address0 in HAL_XC_DIP_SetBase0()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/
H A Dmhal_dip.c2934 DIP_W4BYTE(0, REG_SC_BK36_30_L, u64BufEnd); // input address0 in HAL_XC_DIP_SetBase0()
/utopia/UTPA2-700.0.x/modules/xc/drv/xc/include/
H A Dhwreg_sc.h11130 #define REG_SC_BK36_30_L _PK_L_(0x36, 0x30) macro