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Searched refs:REG_SC_BK36_07_L (Results 1 – 15 of 15) sorted by relevance

/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/
H A Dmhal_dip.c1869 SC_W2BYTEMSK(0, REG_SC_BK36_07_L, 0, BIT(15)); in HAL_XC_DIP_SetMiuSel()
1874 SC_W2BYTEMSK(0, REG_SC_BK36_07_L, 0, BIT(15)); in HAL_XC_DIP_SetMiuSel()
1879 SC_W2BYTEMSK(0, REG_SC_BK36_07_L, BIT(15), BIT(15)); in HAL_XC_DIP_SetMiuSel()
1884 SC_W2BYTEMSK(0, REG_SC_BK36_07_L, BIT(15), BIT(15)); in HAL_XC_DIP_SetMiuSel()
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/
H A Dmhal_dip.c1849 SC_W2BYTEMSK(0, REG_SC_BK36_07_L, 0, BIT(15)); in HAL_XC_DIP_SetMiuSel()
1854 SC_W2BYTEMSK(0, REG_SC_BK36_07_L, 0, BIT(15)); in HAL_XC_DIP_SetMiuSel()
1859 SC_W2BYTEMSK(0, REG_SC_BK36_07_L, BIT(15), BIT(15)); in HAL_XC_DIP_SetMiuSel()
1864 SC_W2BYTEMSK(0, REG_SC_BK36_07_L, BIT(15), BIT(15)); in HAL_XC_DIP_SetMiuSel()
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/
H A Dmhal_dip.c1941 SC_W2BYTEMSK(0, REG_SC_BK36_07_L, 0, BIT(15)); in HAL_XC_DIP_SetMiuSel()
1946 SC_W2BYTEMSK(0, REG_SC_BK36_07_L, 0, BIT(15)); in HAL_XC_DIP_SetMiuSel()
1951 SC_W2BYTEMSK(0, REG_SC_BK36_07_L, BIT(15), BIT(15)); in HAL_XC_DIP_SetMiuSel()
1956 SC_W2BYTEMSK(0, REG_SC_BK36_07_L, BIT(15), BIT(15)); in HAL_XC_DIP_SetMiuSel()
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/
H A Dmhal_dip.c2125 SC_W2BYTEMSK(0, REG_SC_BK36_07_L, 0, BIT(15)); in HAL_XC_DIP_SetMiuSel()
2130 SC_W2BYTEMSK(0, REG_SC_BK36_07_L, 0, BIT(15)); in HAL_XC_DIP_SetMiuSel()
2135 SC_W2BYTEMSK(0, REG_SC_BK36_07_L, BIT(15), BIT(15)); in HAL_XC_DIP_SetMiuSel()
2140 SC_W2BYTEMSK(0, REG_SC_BK36_07_L, BIT(15), BIT(15)); in HAL_XC_DIP_SetMiuSel()
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/
H A Dmhal_dip.c2251 SC_W2BYTEMSK(0, REG_SC_BK36_07_L, 0, BIT(15)); in HAL_XC_DIP_SetMiuSel()
2256 SC_W2BYTEMSK(0, REG_SC_BK36_07_L, 0, BIT(15)); in HAL_XC_DIP_SetMiuSel()
2261 SC_W2BYTEMSK(0, REG_SC_BK36_07_L, BIT(15), BIT(15)); in HAL_XC_DIP_SetMiuSel()
2266 SC_W2BYTEMSK(0, REG_SC_BK36_07_L, BIT(15), BIT(15)); in HAL_XC_DIP_SetMiuSel()
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/
H A Dmhal_dip.c2253 SC_W2BYTEMSK(0, REG_SC_BK36_07_L, 0, BIT(15)); in HAL_XC_DIP_SetMiuSel()
2258 SC_W2BYTEMSK(0, REG_SC_BK36_07_L, 0, BIT(15)); in HAL_XC_DIP_SetMiuSel()
2263 SC_W2BYTEMSK(0, REG_SC_BK36_07_L, BIT(15), BIT(15)); in HAL_XC_DIP_SetMiuSel()
2268 SC_W2BYTEMSK(0, REG_SC_BK36_07_L, BIT(15), BIT(15)); in HAL_XC_DIP_SetMiuSel()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/
H A Dmhal_dip.c2003 SC_W2BYTEMSK(0, REG_SC_BK36_07_L, 0, BIT(15)); in HAL_XC_DIP_SetMiuSel()
2008 SC_W2BYTEMSK(0, REG_SC_BK36_07_L, 0, BIT(15)); in HAL_XC_DIP_SetMiuSel()
2013 SC_W2BYTEMSK(0, REG_SC_BK36_07_L, BIT(15), BIT(15)); in HAL_XC_DIP_SetMiuSel()
2018 SC_W2BYTEMSK(0, REG_SC_BK36_07_L, BIT(15), BIT(15)); in HAL_XC_DIP_SetMiuSel()
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/
H A Dmhal_dip.c2639 DIP_W2BYTEMSK(0, REG_SC_BK36_07_L, 0, BIT(15)); in HAL_XC_DIP_SetMiuSel()
2644 DIP_W2BYTEMSK(0, REG_SC_BK36_07_L, 0, BIT(15)); in HAL_XC_DIP_SetMiuSel()
2649 DIP_W2BYTEMSK(0, REG_SC_BK36_07_L, BIT(15), BIT(15)); in HAL_XC_DIP_SetMiuSel()
2654 DIP_W2BYTEMSK(0, REG_SC_BK36_07_L, BIT(15), BIT(15)); in HAL_XC_DIP_SetMiuSel()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/
H A Dmhal_dip.c2594 DIP_W2BYTEMSK(0, REG_SC_BK36_07_L, 0, BIT(15)); in HAL_XC_DIP_SetMiuSel()
2599 DIP_W2BYTEMSK(0, REG_SC_BK36_07_L, 0, BIT(15)); in HAL_XC_DIP_SetMiuSel()
2604 DIP_W2BYTEMSK(0, REG_SC_BK36_07_L, BIT(15), BIT(15)); in HAL_XC_DIP_SetMiuSel()
2609 DIP_W2BYTEMSK(0, REG_SC_BK36_07_L, BIT(15), BIT(15)); in HAL_XC_DIP_SetMiuSel()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/
H A Dmhal_dip.c2640 DIP_W2BYTEMSK(0, REG_SC_BK36_07_L, 0, BIT(15)); in HAL_XC_DIP_SetMiuSel()
2645 DIP_W2BYTEMSK(0, REG_SC_BK36_07_L, 0, BIT(15)); in HAL_XC_DIP_SetMiuSel()
2650 DIP_W2BYTEMSK(0, REG_SC_BK36_07_L, BIT(15), BIT(15)); in HAL_XC_DIP_SetMiuSel()
2655 DIP_W2BYTEMSK(0, REG_SC_BK36_07_L, BIT(15), BIT(15)); in HAL_XC_DIP_SetMiuSel()
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/
H A Dmhal_dip.c2594 DIP_W2BYTEMSK(0, REG_SC_BK36_07_L, 0, BIT(15)); in HAL_XC_DIP_SetMiuSel()
2599 DIP_W2BYTEMSK(0, REG_SC_BK36_07_L, 0, BIT(15)); in HAL_XC_DIP_SetMiuSel()
2604 DIP_W2BYTEMSK(0, REG_SC_BK36_07_L, BIT(15), BIT(15)); in HAL_XC_DIP_SetMiuSel()
2609 DIP_W2BYTEMSK(0, REG_SC_BK36_07_L, BIT(15), BIT(15)); in HAL_XC_DIP_SetMiuSel()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/
H A Dmhal_dip.c2794 DIP_W2BYTEMSK(0, REG_SC_BK36_07_L, 0, BIT(15)); in HAL_XC_DIP_SetMiuSel()
2799 DIP_W2BYTEMSK(0, REG_SC_BK36_07_L, 0, BIT(15)); in HAL_XC_DIP_SetMiuSel()
2804 DIP_W2BYTEMSK(0, REG_SC_BK36_07_L, BIT(15), BIT(15)); in HAL_XC_DIP_SetMiuSel()
2809 DIP_W2BYTEMSK(0, REG_SC_BK36_07_L, BIT(15), BIT(15)); in HAL_XC_DIP_SetMiuSel()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/
H A Dmhal_dip.c2990 DIP_W2BYTEMSK(0, REG_SC_BK36_07_L, 0, BIT(15)); in HAL_XC_DIP_SetMiuSel()
2995 DIP_W2BYTEMSK(0, REG_SC_BK36_07_L, 0, BIT(15)); in HAL_XC_DIP_SetMiuSel()
3000 DIP_W2BYTEMSK(0, REG_SC_BK36_07_L, BIT(15), BIT(15)); in HAL_XC_DIP_SetMiuSel()
3005 DIP_W2BYTEMSK(0, REG_SC_BK36_07_L, BIT(15), BIT(15)); in HAL_XC_DIP_SetMiuSel()
/utopia/UTPA2-700.0.x/modules/xc/drv/xc/
H A Dmdrv_sc_DIPscaling.c2058 u16tmp2 = SC_R2BYTEMSK(0, REG_SC_BK36_07_L, BIT(15)) >> 15; in MDrv_XC_DIP_Read_Info()
/utopia/UTPA2-700.0.x/modules/xc/drv/xc/include/
H A Dhwreg_sc.h11048 #define REG_SC_BK36_07_L _PK_L_(0x36, 0x07) macro