| /utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/ |
| H A D | mhal_dip.c | 753 DIP_W2BYTEMSK(0, REG_SC_BK34_31_L, (bEnable ? BIT(0):0), BIT(0)); in Hal_SC_DWIN_EnableR2YCSC()
2233 DIP_W2BYTEMSK(0, REG_SC_BK34_31_L, BIT(4) ,BIT(4)); in HAL_XC_DIP_SetWinProperty()
2242 DIP_W2BYTEMSK(0, REG_SC_BK34_31_L, 0 ,BIT(4)); in HAL_XC_DIP_SetWinProperty()
2250 DIP_W2BYTEMSK(0, REG_SC_BK34_31_L, 0 ,BIT(4)); in HAL_XC_DIP_SetWinProperty()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/ |
| H A D | mhal_dip.c | 754 DIP_W2BYTEMSK(0, REG_SC_BK34_31_L, (bEnable ? BIT(0):0), BIT(0)); in Hal_SC_DWIN_EnableR2YCSC()
2188 DIP_W2BYTEMSK(0, REG_SC_BK34_31_L, BIT(4) ,BIT(4)); in HAL_XC_DIP_SetWinProperty()
2197 DIP_W2BYTEMSK(0, REG_SC_BK34_31_L, 0 ,BIT(4)); in HAL_XC_DIP_SetWinProperty()
2205 DIP_W2BYTEMSK(0, REG_SC_BK34_31_L, 0 ,BIT(4)); in HAL_XC_DIP_SetWinProperty()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/ |
| H A D | mhal_dip.c | 754 DIP_W2BYTEMSK(0, REG_SC_BK34_31_L, (bEnable ? BIT(0):0), BIT(0)); in Hal_SC_DWIN_EnableR2YCSC()
2234 DIP_W2BYTEMSK(0, REG_SC_BK34_31_L, BIT(4) ,BIT(4)); in HAL_XC_DIP_SetWinProperty()
2243 DIP_W2BYTEMSK(0, REG_SC_BK34_31_L, 0 ,BIT(4)); in HAL_XC_DIP_SetWinProperty()
2251 DIP_W2BYTEMSK(0, REG_SC_BK34_31_L, 0 ,BIT(4)); in HAL_XC_DIP_SetWinProperty()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/ |
| H A D | mhal_dip.c | 754 DIP_W2BYTEMSK(0, REG_SC_BK34_31_L, (bEnable ? BIT(0):0), BIT(0)); in Hal_SC_DWIN_EnableR2YCSC()
2188 DIP_W2BYTEMSK(0, REG_SC_BK34_31_L, BIT(4) ,BIT(4)); in HAL_XC_DIP_SetWinProperty()
2197 DIP_W2BYTEMSK(0, REG_SC_BK34_31_L, 0 ,BIT(4)); in HAL_XC_DIP_SetWinProperty()
2205 DIP_W2BYTEMSK(0, REG_SC_BK34_31_L, 0 ,BIT(4)); in HAL_XC_DIP_SetWinProperty()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/ |
| H A D | mhal_dip.c | 218 SC_W2BYTEMSK(0, REG_SC_BK34_31_L, (bEnable ? BIT(0):0), BIT(0)); in Hal_SC_DWIN_EnableR2YCSC()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/ |
| H A D | mhal_dip.c | 237 SC_W2BYTEMSK(0, REG_SC_BK34_31_L, (bEnable ? BIT(0):0), BIT(0)); in Hal_SC_DWIN_EnableR2YCSC()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/ |
| H A D | mhal_dip.c | 266 SC_W2BYTEMSK(0, REG_SC_BK34_31_L, (bEnable ? BIT(0):0), BIT(0)); in Hal_SC_DWIN_EnableR2YCSC()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/ |
| H A D | mhal_dip.c | 264 SC_W2BYTEMSK(0, REG_SC_BK34_31_L, (bEnable ? BIT(0):0), BIT(0)); in Hal_SC_DWIN_EnableR2YCSC()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/ |
| H A D | mhal_dip.c | 264 SC_W2BYTEMSK(0, REG_SC_BK34_31_L, (bEnable ? BIT(0):0), BIT(0)); in Hal_SC_DWIN_EnableR2YCSC()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/ |
| H A D | mhal_dip.c | 419 SC_W2BYTEMSK(0, REG_SC_BK34_31_L, (bEnable ? BIT(0):0), BIT(0)); in Hal_SC_DWIN_EnableR2YCSC()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/ |
| H A D | mhal_dip.c | 388 SC_W2BYTEMSK(0, REG_SC_BK34_31_L, (bEnable ? BIT(0):0), BIT(0)); in Hal_SC_DWIN_EnableR2YCSC()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/ |
| H A D | mhal_dip.c | 390 SC_W2BYTEMSK(0, REG_SC_BK34_31_L, (bEnable ? BIT(0):0), BIT(0)); in Hal_SC_DWIN_EnableR2YCSC()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/ |
| H A D | mhal_dip.c | 268 SC_W2BYTEMSK(0, REG_SC_BK34_31_L, (bEnable ? BIT(0):0), BIT(0)); in Hal_SC_DWIN_EnableR2YCSC()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/ |
| H A D | mhal_dip.c | 1061 DIP_W2BYTEMSK(0, REG_SC_BK34_31_L, (bEnable ? BIT(0):0), BIT(0)); in Hal_SC_DWIN_EnableR2YCSC()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/ |
| H A D | mhal_dip.c | 1107 DIP_W2BYTEMSK(0, REG_SC_BK34_31_L, (bEnable ? BIT(0):0), BIT(0)); in Hal_SC_DWIN_EnableR2YCSC()
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| /utopia/UTPA2-700.0.x/modules/xc/drv/xc/include/ |
| H A D | hwreg_sc.h | 10612 #define REG_SC_BK34_31_L _PK_L_(0x34, 0x31) macro
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