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Searched refs:REG_SC_BK23_41_L (Results 1 – 25 of 66) sorted by relevance

123

/utopia/UTPA2-700.0.x/modules/pq/hal/M7821/pq/
H A Dmhal_pq.c574 MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, 0x0002, 0x0002); // enable c_sram_rw in Hal_PQ_set_c_sram_table()
578 while(MApi_XC_R2BYTE(REG_SC_BK23_41_L) & 0x0100); in Hal_PQ_set_c_sram_table()
602 MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, 0x0100, 0x0100); in Hal_PQ_set_c_sram_table()
605 MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, 0x00, 0x00FF); in Hal_PQ_set_c_sram_table()
630 MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, 0x0001, 0x0001); // enable y_sram_rw in Hal_PQ_set_y_sram_table()
633 while(MApi_XC_R2BYTE(REG_SC_BK23_41_L) & 0x0100); in Hal_PQ_set_y_sram_table()
666 MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, 0x0100, 0x0100); in Hal_PQ_set_y_sram_table()
668 MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, 0x00, 0x00FF); in Hal_PQ_set_y_sram_table()
686 MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, 0x0001, 0x0001); // enable y_sram_rw in Hal_PQ_set_y_sram_table()
689 while(MApi_XC_R2BYTE(REG_SC_BK23_41_L) & 0x0100); in Hal_PQ_set_y_sram_table()
[all …]
/utopia/UTPA2-700.0.x/modules/pq/hal/M7621/pq/
H A Dmhal_pq.c574 MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, 0x0002, 0x0002); // enable c_sram_rw in Hal_PQ_set_c_sram_table()
578 while(MApi_XC_R2BYTE(REG_SC_BK23_41_L) & 0x0100); in Hal_PQ_set_c_sram_table()
602 MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, 0x0100, 0x0100); in Hal_PQ_set_c_sram_table()
605 MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, 0x00, 0x00FF); in Hal_PQ_set_c_sram_table()
630 MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, 0x0001, 0x0001); // enable y_sram_rw in Hal_PQ_set_y_sram_table()
633 while(MApi_XC_R2BYTE(REG_SC_BK23_41_L) & 0x0100); in Hal_PQ_set_y_sram_table()
666 MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, 0x0100, 0x0100); in Hal_PQ_set_y_sram_table()
668 MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, 0x00, 0x00FF); in Hal_PQ_set_y_sram_table()
686 MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, 0x0001, 0x0001); // enable y_sram_rw in Hal_PQ_set_y_sram_table()
689 while(MApi_XC_R2BYTE(REG_SC_BK23_41_L) & 0x0100); in Hal_PQ_set_y_sram_table()
[all …]
/utopia/UTPA2-700.0.x/modules/pq/hal/maserati/pq/
H A Dmhal_pq.c574 MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, 0x0002, 0x0002); // enable c_sram_rw in Hal_PQ_set_c_sram_table()
578 while(MApi_XC_R2BYTE(REG_SC_BK23_41_L) & 0x0100); in Hal_PQ_set_c_sram_table()
602 MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, 0x0100, 0x0100); in Hal_PQ_set_c_sram_table()
605 MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, 0x00, 0x00FF); in Hal_PQ_set_c_sram_table()
630 MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, 0x0001, 0x0001); // enable y_sram_rw in Hal_PQ_set_y_sram_table()
633 while(MApi_XC_R2BYTE(REG_SC_BK23_41_L) & 0x0100); in Hal_PQ_set_y_sram_table()
666 MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, 0x0100, 0x0100); in Hal_PQ_set_y_sram_table()
668 MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, 0x00, 0x00FF); in Hal_PQ_set_y_sram_table()
686 MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, 0x0001, 0x0001); // enable y_sram_rw in Hal_PQ_set_y_sram_table()
689 while(MApi_XC_R2BYTE(REG_SC_BK23_41_L) & 0x0100); in Hal_PQ_set_y_sram_table()
[all …]
/utopia/UTPA2-700.0.x/modules/pq/hal/maxim/pq/
H A Dmhal_pq.c574 MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, 0x0002, 0x0002); // enable c_sram_rw in Hal_PQ_set_c_sram_table()
578 while(MApi_XC_R2BYTE(REG_SC_BK23_41_L) & 0x0100); in Hal_PQ_set_c_sram_table()
602 MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, 0x0100, 0x0100); in Hal_PQ_set_c_sram_table()
605 MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, 0x00, 0x00FF); in Hal_PQ_set_c_sram_table()
630 MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, 0x0001, 0x0001); // enable y_sram_rw in Hal_PQ_set_y_sram_table()
633 while(MApi_XC_R2BYTE(REG_SC_BK23_41_L) & 0x0100); in Hal_PQ_set_y_sram_table()
666 MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, 0x0100, 0x0100); in Hal_PQ_set_y_sram_table()
668 MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, 0x00, 0x00FF); in Hal_PQ_set_y_sram_table()
686 MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, 0x0001, 0x0001); // enable y_sram_rw in Hal_PQ_set_y_sram_table()
689 while(MApi_XC_R2BYTE(REG_SC_BK23_41_L) & 0x0100); in Hal_PQ_set_y_sram_table()
[all …]
/utopia/UTPA2-700.0.x/modules/pq/hal/k6lite/pq/
H A Dmhal_pq.c381 MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, 0x0002, 0x0002); // enable c_sram_rw in Hal_PQ_set_c_sram_table()
385 while(MApi_XC_R2BYTE(REG_SC_BK23_41_L) & 0x0100); in Hal_PQ_set_c_sram_table()
409 MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, 0x0100, 0x0100); in Hal_PQ_set_c_sram_table()
411 while(MApi_XC_R2BYTE(REG_SC_BK23_41_L) & 0x0100); in Hal_PQ_set_c_sram_table()
413 MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, 0x00, 0x00FF); in Hal_PQ_set_c_sram_table()
452 MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, 0x0001, 0x0001); // enable y_sram_rw in Hal_PQ_set_y_sram_table()
455 while(MApi_XC_R2BYTE(REG_SC_BK23_41_L) & 0x0100); in Hal_PQ_set_y_sram_table()
494 MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, 0x0100, 0x0100); in Hal_PQ_set_y_sram_table()
496 while(MApi_XC_R2BYTE(REG_SC_BK23_41_L) & 0x0100); in Hal_PQ_set_y_sram_table()
504 MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, 0x00, 0x00FF); in Hal_PQ_set_y_sram_table()
/utopia/UTPA2-700.0.x/modules/pq/hal/kano/pq/
H A Dmhal_pq.c381 MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, 0x0002, 0x0002); // enable c_sram_rw in Hal_PQ_set_c_sram_table()
385 while(MApi_XC_R2BYTE(REG_SC_BK23_41_L) & 0x0100); in Hal_PQ_set_c_sram_table()
409 MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, 0x0100, 0x0100); in Hal_PQ_set_c_sram_table()
411 while(MApi_XC_R2BYTE(REG_SC_BK23_41_L) & 0x0100); in Hal_PQ_set_c_sram_table()
413 MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, 0x00, 0x00FF); in Hal_PQ_set_c_sram_table()
454 MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, 0x0001, 0x0001); // enable y_sram_rw in Hal_PQ_set_y_sram_table()
457 while(MApi_XC_R2BYTE(REG_SC_BK23_41_L) & 0x0100); in Hal_PQ_set_y_sram_table()
496 MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, 0x0100, 0x0100); in Hal_PQ_set_y_sram_table()
498 while(MApi_XC_R2BYTE(REG_SC_BK23_41_L) & 0x0100); in Hal_PQ_set_y_sram_table()
506 MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, 0x00, 0x00FF); in Hal_PQ_set_y_sram_table()
/utopia/UTPA2-700.0.x/modules/pq/hal/k6/pq/
H A Dmhal_pq.c381 MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, 0x0002, 0x0002); // enable c_sram_rw in Hal_PQ_set_c_sram_table()
385 while(MApi_XC_R2BYTE(REG_SC_BK23_41_L) & 0x0100); in Hal_PQ_set_c_sram_table()
409 MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, 0x0100, 0x0100); in Hal_PQ_set_c_sram_table()
411 while(MApi_XC_R2BYTE(REG_SC_BK23_41_L) & 0x0100); in Hal_PQ_set_c_sram_table()
413 MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, 0x00, 0x00FF); in Hal_PQ_set_c_sram_table()
452 MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, 0x0001, 0x0001); // enable y_sram_rw in Hal_PQ_set_y_sram_table()
455 while(MApi_XC_R2BYTE(REG_SC_BK23_41_L) & 0x0100); in Hal_PQ_set_y_sram_table()
494 MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, 0x0100, 0x0100); in Hal_PQ_set_y_sram_table()
496 while(MApi_XC_R2BYTE(REG_SC_BK23_41_L) & 0x0100); in Hal_PQ_set_y_sram_table()
504 MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, 0x00, 0x00FF); in Hal_PQ_set_y_sram_table()
/utopia/UTPA2-700.0.x/modules/pq/hal/curry/pq/
H A Dmhal_pq.c381 MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, 0x0002, 0x0002); // enable c_sram_rw in Hal_PQ_set_c_sram_table()
385 while(MApi_XC_R2BYTE(REG_SC_BK23_41_L) & 0x0100); in Hal_PQ_set_c_sram_table()
409 MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, 0x0100, 0x0100); in Hal_PQ_set_c_sram_table()
411 while(MApi_XC_R2BYTE(REG_SC_BK23_41_L) & 0x0100); in Hal_PQ_set_c_sram_table()
413 MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, 0x00, 0x00FF); in Hal_PQ_set_c_sram_table()
452 MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, 0x0001, 0x0001); // enable y_sram_rw in Hal_PQ_set_y_sram_table()
455 while(MApi_XC_R2BYTE(REG_SC_BK23_41_L) & 0x0100); in Hal_PQ_set_y_sram_table()
494 MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, 0x0100, 0x0100); in Hal_PQ_set_y_sram_table()
496 while(MApi_XC_R2BYTE(REG_SC_BK23_41_L) & 0x0100); in Hal_PQ_set_y_sram_table()
504 MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, 0x00, 0x00FF); in Hal_PQ_set_y_sram_table()
/utopia/UTPA2-700.0.x/modules/pq/hal/mooney/pq/
H A Dmhal_pq.c564 MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, 0x0002, 0x0002); // enable c_sram_rw in Hal_PQ_set_c_sram_table()
568 while(MApi_XC_R2BYTE(REG_SC_BK23_41_L) & 0x0100); in Hal_PQ_set_c_sram_table()
592 MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, 0x0100, 0x0100); in Hal_PQ_set_c_sram_table()
595 MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, 0x00, 0x00FF); in Hal_PQ_set_c_sram_table()
626 MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, 0x0001, 0x0001); // enable y_sram_rw in Hal_PQ_set_y_sram_table()
630 while(MApi_XC_R2BYTE(REG_SC_BK23_41_L) & 0x0100); in Hal_PQ_set_y_sram_table()
665 MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, 0x0100, 0x0100); in Hal_PQ_set_y_sram_table()
668 MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, 0x00, 0x00FF); in Hal_PQ_set_y_sram_table()
/utopia/UTPA2-700.0.x/modules/pq/hal/manhattan/pq/
H A Dmhal_pq.c382 MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, 0x0002, 0x0002); // enable c_sram_rw in Hal_PQ_set_c_sram_table()
386 while(MApi_XC_R2BYTE(REG_SC_BK23_41_L) & 0x0100); in Hal_PQ_set_c_sram_table()
410 MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, 0x0100, 0x0100); in Hal_PQ_set_c_sram_table()
413 MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, 0x00, 0x00FF); in Hal_PQ_set_c_sram_table()
437 MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, 0x0001, 0x0001); // enable y_sram_rw in Hal_PQ_set_y_sram_table()
440 while(MApi_XC_R2BYTE(REG_SC_BK23_41_L) & 0x0100); in Hal_PQ_set_y_sram_table()
473 MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, 0x0100, 0x0100); in Hal_PQ_set_y_sram_table()
475 MApi_XC_W2BYTEMSK(REG_SC_BK23_41_L, 0x00, 0x00FF); in Hal_PQ_set_y_sram_table()
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/
H A Dmhal_sc.c1057 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK23_41_L, 0x0001, 0x0001); in _Hal_SC1_LoadVSPFilter()
1063 while(SC_R2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK23_41_L) & 0x0100); in _Hal_SC1_LoadVSPFilter()
1072 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK23_41_L, 0x0100, 0x0100); in _Hal_SC1_LoadVSPFilter()
1075 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK23_41_L, 0x00, 0x00FF); in _Hal_SC1_LoadVSPFilter()
1081 … SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK23_41_L, 0x0002, 0x0002); // enable c_sram_rw in _Hal_SC1_LoadVSPFilter()
1086 while(SC_R2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK23_41_L) & 0x0100); in _Hal_SC1_LoadVSPFilter()
1093 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK23_41_L, 0x0100, 0x0100); in _Hal_SC1_LoadVSPFilter()
1096 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK23_41_L, 0x00, 0x00FF); in _Hal_SC1_LoadVSPFilter()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/
H A Dmhal_sc.c1053 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK23_41_L, 0x0001, 0x0001); in _Hal_SC1_LoadVSPFilter()
1059 while(SC_R2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK23_41_L) & 0x0100); in _Hal_SC1_LoadVSPFilter()
1068 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK23_41_L, 0x0100, 0x0100); in _Hal_SC1_LoadVSPFilter()
1071 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK23_41_L, 0x00, 0x00FF); in _Hal_SC1_LoadVSPFilter()
1077 … SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK23_41_L, 0x0002, 0x0002); // enable c_sram_rw in _Hal_SC1_LoadVSPFilter()
1082 while(SC_R2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK23_41_L) & 0x0100); in _Hal_SC1_LoadVSPFilter()
1089 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK23_41_L, 0x0100, 0x0100); in _Hal_SC1_LoadVSPFilter()
1092 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK23_41_L, 0x00, 0x00FF); in _Hal_SC1_LoadVSPFilter()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/
H A Dmhal_sc.c1189 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK23_41_L, 0x0001, 0x0001); in _Hal_SC1_LoadVSPFilter()
1195 while(SC_R2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK23_41_L) & 0x0100); in _Hal_SC1_LoadVSPFilter()
1289 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK23_41_L, 0x0100, 0x0100); in _Hal_SC1_LoadVSPFilter()
1292 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK23_41_L, 0x00, 0x00FF); in _Hal_SC1_LoadVSPFilter()
1298 … SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK23_41_L, 0x0002, 0x0002); // enable c_sram_rw in _Hal_SC1_LoadVSPFilter()
1303 while(SC_R2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK23_41_L) & 0x0100); in _Hal_SC1_LoadVSPFilter()
1310 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK23_41_L, 0x0100, 0x0100); in _Hal_SC1_LoadVSPFilter()
1313 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK23_41_L, 0x00, 0x00FF); in _Hal_SC1_LoadVSPFilter()
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/
H A Dmhal_sc.c991 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK23_41_L, 0x0001, 0x0001); in _Hal_SC1_LoadVSPFilter()
997 while(SC_R2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK23_41_L) & 0x0100); in _Hal_SC1_LoadVSPFilter()
1006 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK23_41_L, 0x0100, 0x0100); in _Hal_SC1_LoadVSPFilter()
1009 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK23_41_L, 0x00, 0x00FF); in _Hal_SC1_LoadVSPFilter()
/utopia/UTPA2-700.0.x/modules/wble/hal/manhattan/wble/include/
H A Dhwreg_wble.h6509 #define REG_SC_BK23_41_L _PK_L_(0x23, 0x41) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/ace/include/
H A Dhwreg_ace.h6509 #define REG_SC_BK23_41_L _PK_L_(0x23, 0x41) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/k6/dlc/include/
H A Dhwreg_dlc.h6511 #define REG_SC_BK23_41_L _PK_L_(0x23, 0x41) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/ace/include/
H A Dhwreg_ace.h6520 #define REG_SC_BK23_41_L _PK_L_(0x23, 0x41) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/manhattan/dlc/include/
H A Dhwreg_dlc.h6511 #define REG_SC_BK23_41_L _PK_L_(0x23, 0x41) macro
/utopia/UTPA2-700.0.x/modules/wble/hal/macan/wble/include/
H A Dhwreg_wble.h6509 #define REG_SC_BK23_41_L _PK_L_(0x23, 0x41) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/curry/dlc/include/
H A Dhwreg_dlc.h6511 #define REG_SC_BK23_41_L _PK_L_(0x23, 0x41) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/ace/include/
H A Dhwreg_ace.h6509 #define REG_SC_BK23_41_L _PK_L_(0x23, 0x41) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/M7821/dlc/include/
H A Dhwreg_dlc.h6511 #define REG_SC_BK23_41_L _PK_L_(0x23, 0x41) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/ace/include/
H A Dhwreg_ace.h6509 #define REG_SC_BK23_41_L _PK_L_(0x23, 0x41) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/messi/dlc/include/
H A Dhwreg_dlc.h6511 #define REG_SC_BK23_41_L _PK_L_(0x23, 0x41) macro

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