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Searched refs:REG_SC_BK20_21_L (Results 1 – 25 of 30) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/
H A Dmhal_dynamicscaling.c884 SC_W2BYTEMSK(0, REG_SC_BK20_21_L, 0x23, 0xFF); in MHAL_SC_Set_DynamicScaling()
891 SC_W2BYTEMSK(0, REG_SC_BK20_21_L, 0x11, 0xFF); in MHAL_SC_Set_DynamicScaling()
H A Dmhal_sc.c1047 …MDrv_XC_MLoad_WriteCmd(pInstance, REG_SC_BK20_21_L, 0x19, 0xFF); //patch for MVOP GEN TIMING + H… in _Kano_DB_Patch()
1053 …SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK20_21_L, 0x19, 0xFF); //patch for MVOP GEN TIMIN… in _Kano_DB_Patch()
3947 SC_W2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK20_21_L, 0x0011); // ds trig delay line in Hal_SC_set_trigger_signal()
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/
H A Dmhal_dynamicscaling.c889 SC_W2BYTEMSK(0, REG_SC_BK20_21_L, 0x23, 0xFF); in MHAL_SC_Set_DynamicScaling()
897 SC_W2BYTEMSK(0, REG_SC_BK20_21_L, 0x11, 0xFF); in MHAL_SC_Set_DynamicScaling()
H A Dmhal_sc.c1134 …MDrv_XC_MLoad_WriteCmd(pInstance, REG_SC_BK20_21_L, 0x19, 0xFF); //patch for MVOP GEN TIMING + H… in _Kano_DB_Patch()
1140 …SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK20_21_L, 0x19, 0xFF); //patch for MVOP GEN TIMIN… in _Kano_DB_Patch()
4052 SC_W2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK20_21_L, 0x0011); // ds trig delay line in Hal_SC_set_trigger_signal()
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/
H A Dmhal_dynamicscaling.c1027 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK20_21_L, 0x09, 0xFF); // ds_trig_dly in MHAL_SC_Set_DynamicScaling()
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/
H A Dmhal_dynamicscaling.c1154 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK20_21_L, 0x09, 0xFF); // ds_trig_dly in MHAL_SC_Set_DynamicScaling()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/
H A Dmhal_dynamicscaling.c1408 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK20_21_L, 0x08, 0xFF); // ds_trig_dly in MHAL_SC_Set_DynamicScaling()
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/
H A Dmhal_dynamicscaling.c1307 SC_W2BYTEMSK(0, REG_SC_BK20_21_L, 0x08, 0xFF); // ds_trig_dly in MHAL_SC_Set_DynamicScaling()
H A Dmhal_sc.c2283 SC_W2BYTEMSK(0,REG_SC_BK20_21_L, 0x08, 0xFF); // ds_trig_dly in HAL_SC_Set_DynamicScaling()
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/
H A Dmhal_dynamicscaling.c1367 SC_W2BYTEMSK(0, REG_SC_BK20_21_L, 0x08, 0xFF); // ds_trig_dly in MHAL_SC_Set_DynamicScaling()
H A Dmhal_sc.c2303 SC_W2BYTEMSK(0,REG_SC_BK20_21_L, 0x08, 0xFF); // ds_trig_dly in HAL_SC_Set_DynamicScaling()
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/
H A Dmhal_dynamicscaling.c1166 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK20_21_L, 0x23, 0xFF); // ds_trig_dly in MHAL_SC_Set_DynamicScaling()
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/
H A Dmhal_dynamicscaling.c1528 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK20_21_L, 0x08, 0xFF); // ds_trig_dly in MHAL_SC_Set_DynamicScaling()
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/
H A Dmhal_dynamicscaling.c1826 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK20_21_L, 0x08, 0xFF); // ds_trig_dly in MHAL_SC_Set_DynamicScaling()
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/
H A Dmhal_dynamicscaling.c1826 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK20_21_L, 0x08, 0xFF); // ds_trig_dly in MHAL_SC_Set_DynamicScaling()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/
H A Dmhal_dynamicscaling.c1826 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK20_21_L, 0x08, 0xFF); // ds_trig_dly in MHAL_SC_Set_DynamicScaling()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/
H A Dmhal_dynamicscaling.c1826 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK20_21_L, 0x08, 0xFF); // ds_trig_dly in MHAL_SC_Set_DynamicScaling()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/
H A Dmhal_sc.c4048 SC_W2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK20_21_L, 0x0011); // ds trig delay line in Hal_SC_set_trigger_signal()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/
H A Dmhal_sc.c4252 SC_W2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK20_21_L, 0x0011); // ds trig delay line in Hal_SC_set_trigger_signal()
/utopia/UTPA2-700.0.x/modules/pq/hal/mooney/pq/include/
H A Dcolor_reg.h8452 #define REG_SC_BK20_21_L _PK_L_(0x20, 0x21) macro
/utopia/UTPA2-700.0.x/modules/xc/drv/xc/include/
H A Dhwreg_sc.h7468 #define REG_SC_BK20_21_L _PK_L_(0x20, 0x21) macro
/utopia/UTPA2-700.0.x/modules/pq/hal/k6lite/pq/include/
H A Dcolor_reg.h8452 #define REG_SC_BK20_21_L _PK_L_(0x20, 0x21) macro
/utopia/UTPA2-700.0.x/modules/pq/hal/kano/pq/include/
H A Dcolor_reg.h8452 #define REG_SC_BK20_21_L _PK_L_(0x20, 0x21) macro
/utopia/UTPA2-700.0.x/modules/pq/hal/k6/pq/include/
H A Dcolor_reg.h8452 #define REG_SC_BK20_21_L _PK_L_(0x20, 0x21) macro
/utopia/UTPA2-700.0.x/modules/pq/hal/curry/pq/include/
H A Dcolor_reg.h8452 #define REG_SC_BK20_21_L _PK_L_(0x20, 0x21) macro

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