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Searched refs:REG_SC_BK20_18_L (Results 1 – 25 of 57) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/
H A Dmhal_dip.c560 …MDrv_XC_MLoad_WriteCmd(pInstance, REG_SC_BK20_18_L, (BIT(2)|BIT(13)|BIT(15)),BIT(2)|BIT(13)|BIT(15… in HAL_XC_DIP_EnableCaptureStream()
565 … MDrv_XC_MLoad_WriteCmd(pInstance, REG_SC_BK20_18_L, (BIT(13)|BIT(15)),BIT(2)|BIT(13)|BIT(15)); in HAL_XC_DIP_EnableCaptureStream()
572 MDrv_XC_MLoad_WriteCmd(pInstance, REG_SC_BK20_18_L, BIT(2) ,BIT(2)|BIT(13)|BIT(15)); in HAL_XC_DIP_EnableCaptureStream()
608 MDrv_XC_MLoad_WriteCmd(pInstance, REG_SC_BK20_18_L, BIT(15) ,BIT(2)|BIT(13)|BIT(15)); in HAL_XC_DIP_EnableCaptureStream()
616 MDrv_XC_MLoad_WriteCmd(pInstance, REG_SC_BK20_18_L, BIT(15) ,BIT(2)|BIT(13)|BIT(15)); in HAL_XC_DIP_EnableCaptureStream()
747 …MDrv_XC_MLoad_WriteCmd(pInstance, REG_SC_BK20_18_L, (BIT(2)|BIT(13)|BIT(15)),BIT(2)|BIT(13)|BIT(15… in HAL_XC_DIP_CpatureOneFrame2()
752 … MDrv_XC_MLoad_WriteCmd(pInstance, REG_SC_BK20_18_L, (BIT(13)|BIT(15)),BIT(2)|BIT(13)|BIT(15)); in HAL_XC_DIP_CpatureOneFrame2()
759 MDrv_XC_MLoad_WriteCmd(pInstance, REG_SC_BK20_18_L, BIT(2) ,BIT(2)|BIT(13)|BIT(15)); in HAL_XC_DIP_CpatureOneFrame2()
H A Dmhal_sc.c3862 u16OP1_reg_di1lb_en = SC_R2BYTEMSK(0,REG_SC_BK20_18_L,0xFFFF); in MHal_SC_OP1_Pattern_backup_setting()
4122 SC_W2BYTEMSK(0,REG_SC_BK20_18_L, 0x10,0xFFFF); in MHal_SC_OP1_Pattern_init_setting()
4160 SC_W2BYTEMSK(0,REG_SC_BK20_18_L, u16OP1_reg_di1lb_en, BIT(4)); in MHal_SC_OP1_Pattern_restore_setting()
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/
H A Dmhal_dip.c579 …MDrv_XC_MLoad_WriteCmd(pInstance, REG_SC_BK20_18_L, (BIT(2)|BIT(13)|BIT(15)),BIT(2)|BIT(13)|BIT(15… in HAL_XC_DIP_EnableCaptureStream()
584 … MDrv_XC_MLoad_WriteCmd(pInstance, REG_SC_BK20_18_L, (BIT(13)|BIT(15)),BIT(2)|BIT(13)|BIT(15)); in HAL_XC_DIP_EnableCaptureStream()
591 MDrv_XC_MLoad_WriteCmd(pInstance, REG_SC_BK20_18_L, BIT(2) ,BIT(2)|BIT(13)|BIT(15)); in HAL_XC_DIP_EnableCaptureStream()
627 MDrv_XC_MLoad_WriteCmd(pInstance, REG_SC_BK20_18_L, BIT(15) ,BIT(2)|BIT(13)|BIT(15)); in HAL_XC_DIP_EnableCaptureStream()
635 MDrv_XC_MLoad_WriteCmd(pInstance, REG_SC_BK20_18_L, BIT(15) ,BIT(2)|BIT(13)|BIT(15)); in HAL_XC_DIP_EnableCaptureStream()
766 …MDrv_XC_MLoad_WriteCmd(pInstance, REG_SC_BK20_18_L, (BIT(2)|BIT(13)|BIT(15)),BIT(2)|BIT(13)|BIT(15… in HAL_XC_DIP_CpatureOneFrame2()
771 … MDrv_XC_MLoad_WriteCmd(pInstance, REG_SC_BK20_18_L, (BIT(13)|BIT(15)),BIT(2)|BIT(13)|BIT(15)); in HAL_XC_DIP_CpatureOneFrame2()
778 MDrv_XC_MLoad_WriteCmd(pInstance, REG_SC_BK20_18_L, BIT(2) ,BIT(2)|BIT(13)|BIT(15)); in HAL_XC_DIP_CpatureOneFrame2()
H A Dmhal_sc.c3828 u16OP1_reg_di1lb_en = SC_R2BYTEMSK(0,REG_SC_BK20_18_L,0xFFFF); in MHal_SC_OP1_Pattern_backup_setting()
4088 SC_W2BYTEMSK(0,REG_SC_BK20_18_L, 0x10,0xFFFF); in MHal_SC_OP1_Pattern_init_setting()
4126 SC_W2BYTEMSK(0,REG_SC_BK20_18_L, u16OP1_reg_di1lb_en, BIT(4)); in MHal_SC_OP1_Pattern_restore_setting()
/utopia/UTPA2-700.0.x/modules/xc/drv/xc/
H A Dmdrv_sc_3d.c476 …SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK20_18_L, BIT(5), BIT(5)); //Force DI 2-line mode a… in MDrv_SC_3D_Set2TapMode()
510 …SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK20_18_L, 0x0, BIT(5)); //Force DI 2-line mode at s… in MDrv_SC_3D_Set2TapMode()
15899 …SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK20_18_L, 0x0002, 0x0002);//Force F1 use F2's regis… in MDrv_XC_3D_CfgSubWin()
15939 …SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK20_18_L, 0x0000, 0x0002);//Force F1 use F2's regis… in MDrv_XC_3D_CfgSubWin()
16090 …SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK20_18_L, 0x0000, 0x0002);//Force F1 use F2's regis… in MDrv_XC_3D_LoadReg()
16143 …SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK20_18_L, 0x0, BIT(5)); //Force DI 2-line mode at s… in MDrv_XC_3D_LoadReg()
16148 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK20_18_L, 0x0, BIT(9));//fbl 3d enable in MDrv_XC_3D_LoadReg()
16414 …SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK20_18_L, 0x0, BIT(5)); //Force DI 2-line mode at s… in MDrv_XC_3D_LoadReg()
17205 … SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK20_18_L, BIT(9), BIT(9));//fbl 3d enable in MDrv_XC_3D_LoadReg()
17695 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK20_18_L, BIT(1), BIT(1));//reg_force_f2 in MDrv_XC_3D_LoadReg()
[all …]
/utopia/UTPA2-700.0.x/modules/wble/hal/manhattan/wble/include/
H A Dhwreg_wble.h6153 #define REG_SC_BK20_18_L _PK_L_(0x20, 0x18) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/ace/include/
H A Dhwreg_ace.h6153 #define REG_SC_BK20_18_L _PK_L_(0x20, 0x18) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/k6/dlc/include/
H A Dhwreg_dlc.h6155 #define REG_SC_BK20_18_L _PK_L_(0x20, 0x18) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/ace/include/
H A Dhwreg_ace.h6164 #define REG_SC_BK20_18_L _PK_L_(0x20, 0x18) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/manhattan/dlc/include/
H A Dhwreg_dlc.h6155 #define REG_SC_BK20_18_L _PK_L_(0x20, 0x18) macro
/utopia/UTPA2-700.0.x/modules/wble/hal/macan/wble/include/
H A Dhwreg_wble.h6153 #define REG_SC_BK20_18_L _PK_L_(0x20, 0x18) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/curry/dlc/include/
H A Dhwreg_dlc.h6155 #define REG_SC_BK20_18_L _PK_L_(0x20, 0x18) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/ace/include/
H A Dhwreg_ace.h6153 #define REG_SC_BK20_18_L _PK_L_(0x20, 0x18) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/M7821/dlc/include/
H A Dhwreg_dlc.h6155 #define REG_SC_BK20_18_L _PK_L_(0x20, 0x18) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/ace/include/
H A Dhwreg_ace.h6153 #define REG_SC_BK20_18_L _PK_L_(0x20, 0x18) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/messi/dlc/include/
H A Dhwreg_dlc.h6155 #define REG_SC_BK20_18_L _PK_L_(0x20, 0x18) macro
/utopia/UTPA2-700.0.x/modules/wble/hal/messi/wble/include/
H A Dhwreg_wble.h6153 #define REG_SC_BK20_18_L _PK_L_(0x20, 0x18) macro
/utopia/UTPA2-700.0.x/modules/wble/hal/M7821/wble/include/
H A Dhwreg_wble.h6153 #define REG_SC_BK20_18_L _PK_L_(0x20, 0x18) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/ace/include/
H A Dhwreg_ace.h6153 #define REG_SC_BK20_18_L _PK_L_(0x20, 0x18) macro
/utopia/UTPA2-700.0.x/modules/wble/hal/maxim/wble/include/
H A Dhwreg_wble.h6153 #define REG_SC_BK20_18_L _PK_L_(0x20, 0x18) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/M7621/dlc/include/
H A Dhwreg_dlc.h6155 #define REG_SC_BK20_18_L _PK_L_(0x20, 0x18) macro
/utopia/UTPA2-700.0.x/modules/wble/hal/mainz/wble/include/
H A Dhwreg_wble.h6153 #define REG_SC_BK20_18_L _PK_L_(0x20, 0x18) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/maserati/dlc/include/
H A Dhwreg_dlc.h6155 #define REG_SC_BK20_18_L _PK_L_(0x20, 0x18) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/mainz/dlc/include/
H A Dhwreg_dlc.h6155 #define REG_SC_BK20_18_L _PK_L_(0x20, 0x18) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/maldives/dlc/include/
H A Dhwreg_dlc.h6415 #define REG_SC_BK20_18_L _PK_L_(0x20, 0x18) macro

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