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Searched refs:REG_SC_BK19_30_L (Results 1 – 25 of 73) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/pq/hal/mooney/pq/include/
H A DMooney_Main.c16582 { PQ_MAP_REG(REG_SC_BK19_30_L), 0x01, 0x01 },
16697 { PQ_MAP_REG(REG_SC_BK19_30_L), 0x40, 0x00 },//Same mark
16707 { PQ_MAP_REG(REG_SC_BK19_30_L), 0x80, 0x00/*$OFF*/,
60822 { PQ_MAP_REG(REG_SC_BK19_30_L), 0x01, 0x01/*OFF*/, },
60835 { PQ_MAP_REG(REG_SC_BK19_30_L), 0x80, 0x00/*OFF*/, },
60836 { PQ_MAP_REG(REG_SC_BK19_30_L), 0x40, 0x00/*OFF*/, },
61419 { PQ_MAP_REG(REG_SC_BK19_30_L), 0x02, 0x02/*OFF*/, },
61432 { PQ_MAP_REG(REG_SC_BK19_30_L), 0x08, 0x00/*OFF*/, },
61433 { PQ_MAP_REG(REG_SC_BK19_30_L), 0x04, 0x00/*OFF*/, },
61923 { PQ_MAP_REG(REG_SC_BK19_30_L), 0x80, 0x80/*ON*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/pq/hal/maserati/pq/include/
H A DMaserati_Main.c64813 { PQ_MAP_REG(REG_SC_BK19_30_L), 0xC0, 0x00/*$OFF*/,
113951 { PQ_MAP_REG(REG_SC_BK19_30_L), 0x80, 0x00/*OFF*/, },
113952 { PQ_MAP_REG(REG_SC_BK19_30_L), 0x40, 0x00/*OFF*/, },
114723 { PQ_MAP_REG(REG_SC_BK19_30_L), 0x08, 0x00/*OFF*/, },
114724 { PQ_MAP_REG(REG_SC_BK19_30_L), 0x04, 0x00/*OFF*/, },
115412 { PQ_MAP_REG(REG_SC_BK19_30_L), 0x80, 0x80/*ON*/,
115420 { PQ_MAP_REG(REG_SC_BK19_30_L), 0x40, 0x40/*ON*/,
115636 { PQ_MAP_REG(REG_SC_BK19_30_L), 0x08, 0x08/*ON*/,
115644 { PQ_MAP_REG(REG_SC_BK19_30_L), 0x04, 0x04/*ON*/,
/utopia/UTPA2-700.0.x/modules/pq/hal/M7821/pq/include/
H A DMaserati_Main.c68613 { PQ_MAP_REG(REG_SC_BK19_30_L), 0xC0, 0x00/*$OFF*/,
113487 { PQ_MAP_REG(REG_SC_BK19_30_L), 0x80, 0x00/*OFF*/, },
113488 { PQ_MAP_REG(REG_SC_BK19_30_L), 0x40, 0x00/*OFF*/, },
114283 { PQ_MAP_REG(REG_SC_BK19_30_L), 0x08, 0x00/*OFF*/, },
114284 { PQ_MAP_REG(REG_SC_BK19_30_L), 0x04, 0x00/*OFF*/, },
115004 { PQ_MAP_REG(REG_SC_BK19_30_L), 0x80, 0x80/*ON*/,
115012 { PQ_MAP_REG(REG_SC_BK19_30_L), 0x40, 0x40/*ON*/,
115228 { PQ_MAP_REG(REG_SC_BK19_30_L), 0x08, 0x08/*ON*/,
115236 { PQ_MAP_REG(REG_SC_BK19_30_L), 0x04, 0x04/*ON*/,
/utopia/UTPA2-700.0.x/modules/pq/hal/manhattan/pq/include/
H A DManhattan_Main.c108659 { PQ_MAP_REG(REG_SC_BK19_30_L), 0xC0, 0x00/*$OFF*/,
154689 { PQ_MAP_REG(REG_SC_BK19_30_L), 0x80, 0x00/*OFF*/, },
154690 { PQ_MAP_REG(REG_SC_BK19_30_L), 0x40, 0x00/*OFF*/, },
155613 { PQ_MAP_REG(REG_SC_BK19_30_L), 0x08, 0x00/*OFF*/, },
155614 { PQ_MAP_REG(REG_SC_BK19_30_L), 0x04, 0x00/*OFF*/, },
156351 { PQ_MAP_REG(REG_SC_BK19_30_L), 0x80, 0x80/*ON*/, },
156352 { PQ_MAP_REG(REG_SC_BK19_30_L), 0x40, 0x40/*ON*/, },
156399 { PQ_MAP_REG(REG_SC_BK19_30_L), 0x08, 0x08/*ON*/, },
156400 { PQ_MAP_REG(REG_SC_BK19_30_L), 0x04, 0x04/*ON*/, },
/utopia/UTPA2-700.0.x/modules/pq/hal/maxim/pq/include/
H A DMaxim_Main.c111484 { PQ_MAP_REG(REG_SC_BK19_30_L), 0xC0, 0x00/*$OFF*/,
157273 { PQ_MAP_REG(REG_SC_BK19_30_L), 0x80, 0x00/*OFF*/, },
157274 { PQ_MAP_REG(REG_SC_BK19_30_L), 0x40, 0x00/*OFF*/, },
158069 { PQ_MAP_REG(REG_SC_BK19_30_L), 0x08, 0x00/*OFF*/, },
158070 { PQ_MAP_REG(REG_SC_BK19_30_L), 0x04, 0x00/*OFF*/, },
158783 { PQ_MAP_REG(REG_SC_BK19_30_L), 0x80, 0x80/*ON*/, },
158784 { PQ_MAP_REG(REG_SC_BK19_30_L), 0x40, 0x40/*ON*/, },
158811 { PQ_MAP_REG(REG_SC_BK19_30_L), 0x08, 0x08/*ON*/, },
158812 { PQ_MAP_REG(REG_SC_BK19_30_L), 0x04, 0x04/*ON*/, },
/utopia/UTPA2-700.0.x/modules/pq/hal/M7621/pq/include/
H A DMaxim_Main.c111484 { PQ_MAP_REG(REG_SC_BK19_30_L), 0xC0, 0x00/*$OFF*/,
157273 { PQ_MAP_REG(REG_SC_BK19_30_L), 0x80, 0x00/*OFF*/, },
157274 { PQ_MAP_REG(REG_SC_BK19_30_L), 0x40, 0x00/*OFF*/, },
158069 { PQ_MAP_REG(REG_SC_BK19_30_L), 0x08, 0x00/*OFF*/, },
158070 { PQ_MAP_REG(REG_SC_BK19_30_L), 0x04, 0x00/*OFF*/, },
158783 { PQ_MAP_REG(REG_SC_BK19_30_L), 0x80, 0x80/*ON*/, },
158784 { PQ_MAP_REG(REG_SC_BK19_30_L), 0x40, 0x40/*ON*/, },
158811 { PQ_MAP_REG(REG_SC_BK19_30_L), 0x08, 0x08/*ON*/, },
158812 { PQ_MAP_REG(REG_SC_BK19_30_L), 0x04, 0x04/*ON*/, },
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/ace/
H A Dmhal_ace.c1506 SC_W2BYTEMSK(0,REG_SC_BK19_30_L, u16val, 0x00C1); // BIT(0), BIT(1) are reserved. in Hal_ACE_DNR_SetCP()
1510 SC_W2BYTEMSK(0,REG_SC_BK19_30_L, u16val, 0x000E); // BIT(0), BIT(1) are reserved. in Hal_ACE_DNR_SetCP()
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/ace/
H A Dmhal_ace.c1506 SC_W2BYTEMSK(0,REG_SC_BK19_30_L, u16val, 0x00C1); // BIT(0), BIT(1) are reserved. in Hal_ACE_DNR_SetCP()
1510 SC_W2BYTEMSK(0,REG_SC_BK19_30_L, u16val, 0x000E); // BIT(0), BIT(1) are reserved. in Hal_ACE_DNR_SetCP()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/ace/
H A Dmhal_ace.c1506 SC_W2BYTEMSK(0,REG_SC_BK19_30_L, u16val, 0x00C1); // BIT(0), BIT(1) are reserved. in Hal_ACE_DNR_SetCP()
1510 SC_W2BYTEMSK(0,REG_SC_BK19_30_L, u16val, 0x000E); // BIT(0), BIT(1) are reserved. in Hal_ACE_DNR_SetCP()
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/ace/
H A Dmhal_ace.c1506 SC_W2BYTEMSK(0,REG_SC_BK19_30_L, u16val, 0x00C1); // BIT(0), BIT(1) are reserved. in Hal_ACE_DNR_SetCP()
1510 SC_W2BYTEMSK(0,REG_SC_BK19_30_L, u16val, 0x000E); // BIT(0), BIT(1) are reserved. in Hal_ACE_DNR_SetCP()
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/ace/
H A Dmhal_ace.c1648 SC_W2BYTEMSK(0,REG_SC_BK19_30_L, u16val, 0x00C1); // BIT(0), BIT(1) are reserved. in Hal_ACE_DNR_SetCP()
1652 SC_W2BYTEMSK(0,REG_SC_BK19_30_L, u16val, 0x000E); // BIT(0), BIT(1) are reserved. in Hal_ACE_DNR_SetCP()
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/ace/
H A Dmhal_ace.c1648 SC_W2BYTEMSK(0,REG_SC_BK19_30_L, u16val, 0x00C1); // BIT(0), BIT(1) are reserved. in Hal_ACE_DNR_SetCP()
1652 SC_W2BYTEMSK(0,REG_SC_BK19_30_L, u16val, 0x000E); // BIT(0), BIT(1) are reserved. in Hal_ACE_DNR_SetCP()
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/ace/
H A Dmhal_ace.c1821 SC_W2BYTEMSK(0, REG_SC_BK19_30_L, u16val, 0x00C1); // BIT(0), BIT(1) are reserved. in Hal_ACE_DNR_SetCP()
1825 SC_W2BYTEMSK(0, REG_SC_BK19_30_L, u16val, 0x000E); // BIT(0), BIT(1) are reserved. in Hal_ACE_DNR_SetCP()
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/ace/
H A Dmhal_ace.c2078 SC_W2BYTEMSK(0, REG_SC_BK19_30_L, u16val, 0x00C1); // BIT(0), BIT(1) are reserved. in Hal_ACE_DNR_SetCP()
2082 SC_W2BYTEMSK(0, REG_SC_BK19_30_L, u16val, 0x000E); // BIT(0), BIT(1) are reserved. in Hal_ACE_DNR_SetCP()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/ace/
H A Dmhal_ace.c2134 SC_W2BYTEMSK(0, REG_SC_BK19_30_L, u16val, 0x00C1); // BIT(0), BIT(1) are reserved. in Hal_ACE_DNR_SetCP()
2138 SC_W2BYTEMSK(0, REG_SC_BK19_30_L, u16val, 0x000E); // BIT(0), BIT(1) are reserved. in Hal_ACE_DNR_SetCP()
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/ace/
H A Dmhal_ace.c2059 SC_W2BYTEMSK(0, REG_SC_BK19_30_L, u16val, 0x00C1); // BIT(0), BIT(1) are reserved. in Hal_ACE_DNR_SetCP()
2063 SC_W2BYTEMSK(0, REG_SC_BK19_30_L, u16val, 0x000E); // BIT(0), BIT(1) are reserved. in Hal_ACE_DNR_SetCP()
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/ace/
H A Dmhal_ace.c2059 SC_W2BYTEMSK(0, REG_SC_BK19_30_L, u16val, 0x00C1); // BIT(0), BIT(1) are reserved. in Hal_ACE_DNR_SetCP()
2063 SC_W2BYTEMSK(0, REG_SC_BK19_30_L, u16val, 0x000E); // BIT(0), BIT(1) are reserved. in Hal_ACE_DNR_SetCP()
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/ace/
H A Dmhal_ace.c2169 SC_W2BYTEMSK(0, REG_SC_BK19_30_L, u16val, 0x00C1); // BIT(0), BIT(1) are reserved. in Hal_ACE_DNR_SetCP()
2173 SC_W2BYTEMSK(0, REG_SC_BK19_30_L, u16val, 0x000E); // BIT(0), BIT(1) are reserved. in Hal_ACE_DNR_SetCP()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/ace/
H A Dmhal_ace.c2169 SC_W2BYTEMSK(0, REG_SC_BK19_30_L, u16val, 0x00C1); // BIT(0), BIT(1) are reserved. in Hal_ACE_DNR_SetCP()
2173 SC_W2BYTEMSK(0, REG_SC_BK19_30_L, u16val, 0x000E); // BIT(0), BIT(1) are reserved. in Hal_ACE_DNR_SetCP()
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/ace/
H A Dmhal_ace.c2588 SC_W2BYTEMSK(0, REG_SC_BK19_30_L, u16val, 0x00C1); // BIT(0), BIT(1) are reserved. in Hal_ACE_DNR_SetCP()
2592 SC_W2BYTEMSK(0, REG_SC_BK19_30_L, u16val, 0x000E); // BIT(0), BIT(1) are reserved. in Hal_ACE_DNR_SetCP()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/ace/
H A Dmhal_ace.c2588 SC_W2BYTEMSK(0, REG_SC_BK19_30_L, u16val, 0x00C1); // BIT(0), BIT(1) are reserved. in Hal_ACE_DNR_SetCP()
2592 SC_W2BYTEMSK(0, REG_SC_BK19_30_L, u16val, 0x000E); // BIT(0), BIT(1) are reserved. in Hal_ACE_DNR_SetCP()
/utopia/UTPA2-700.0.x/modules/wble/hal/manhattan/wble/include/
H A Dhwreg_wble.h4898 #define REG_SC_BK19_30_L _PK_L_(0x19, 0x30) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/ace/include/
H A Dhwreg_ace.h4898 #define REG_SC_BK19_30_L _PK_L_(0x19, 0x30) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/k6/dlc/include/
H A Dhwreg_dlc.h4900 #define REG_SC_BK19_30_L _PK_L_(0x19, 0x30) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/ace/include/
H A Dhwreg_ace.h4900 #define REG_SC_BK19_30_L _PK_L_(0x19, 0x30) macro

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