Home
last modified time | relevance | path

Searched refs:REG_SC_BK0F_56_L (Results 1 – 25 of 58) sorted by relevance

123

/utopia/UTPA2-700.0.x/modules/xc/drv/xc/
H A Dmdrv_sc_display.c3309 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK0F_56_L, BIT(1), BIT(1)); //Using new ovs_ref in MDrv_SC_Set_LockFreeze_Point()
3424 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK0F_56_L, 0, BIT(0)); in MDrv_Scaler_FastFrameLock()
3425 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK0F_56_L, 1, BIT(0)); in MDrv_Scaler_FastFrameLock()
3445 … SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK0F_56_L, 0x08, BIT(3)); //SW Reset vcnt freeze in MDrv_Scaler_FastFrameLock()
3446 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK0F_56_L, 0x00, BIT(3)); in MDrv_Scaler_FastFrameLock()
3463 … SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK0F_56_L, 0x08, BIT(3)); //SW Reset vcnt freeze in MDrv_Scaler_FastFrameLock()
3464 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK0F_56_L, 0x00, BIT(3)); in MDrv_Scaler_FastFrameLock()
5383 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK0F_56_L, 0x00 ,BIT(1)); in MApi_XC_SetPanelTiming_FSM()
5388 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK0F_56_L, 0x02 ,BIT(1)); in MApi_XC_SetPanelTiming_FSM()
H A Dmdrv_sc_display.c.03307 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK0F_56_L, BIT(1), BIT(1)); //Using new ovs_ref
3422 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK0F_56_L, 0, BIT(0));
3423 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK0F_56_L, 1, BIT(0));
3443 … SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK0F_56_L, 0x08, BIT(3)); //SW Reset vcnt freeze
3444 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK0F_56_L, 0x00, BIT(3));
3461 … SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK0F_56_L, 0x08, BIT(3)); //SW Reset vcnt freeze
3462 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK0F_56_L, 0x00, BIT(3));
5381 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK0F_56_L, 0x00 ,BIT(1));
5386 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK0F_56_L, 0x02 ,BIT(1));
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/
H A Dmhal_sc.c3683 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK0F_56_L, 0x02, BIT(1)); in Hal_SC_Init()
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/
H A Dmhal_sc.c3723 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK0F_56_L, 0x02, BIT(1)); in Hal_SC_Init()
/utopia/UTPA2-700.0.x/modules/wble/hal/manhattan/wble/include/
H A Dhwreg_wble.h3410 #define REG_SC_BK0F_56_L _PK_L_(0x0F, 0x56) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/ace/include/
H A Dhwreg_ace.h3410 #define REG_SC_BK0F_56_L _PK_L_(0x0F, 0x56) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/k6/dlc/include/
H A Dhwreg_dlc.h3412 #define REG_SC_BK0F_56_L _PK_L_(0x0F, 0x56) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/ace/include/
H A Dhwreg_ace.h3412 #define REG_SC_BK0F_56_L _PK_L_(0x0F, 0x56) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/manhattan/dlc/include/
H A Dhwreg_dlc.h3412 #define REG_SC_BK0F_56_L _PK_L_(0x0F, 0x56) macro
/utopia/UTPA2-700.0.x/modules/wble/hal/macan/wble/include/
H A Dhwreg_wble.h3410 #define REG_SC_BK0F_56_L _PK_L_(0x0F, 0x56) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/curry/dlc/include/
H A Dhwreg_dlc.h3412 #define REG_SC_BK0F_56_L _PK_L_(0x0F, 0x56) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/ace/include/
H A Dhwreg_ace.h3410 #define REG_SC_BK0F_56_L _PK_L_(0x0F, 0x56) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/M7821/dlc/include/
H A Dhwreg_dlc.h3412 #define REG_SC_BK0F_56_L _PK_L_(0x0F, 0x56) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/ace/include/
H A Dhwreg_ace.h3410 #define REG_SC_BK0F_56_L _PK_L_(0x0F, 0x56) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/messi/dlc/include/
H A Dhwreg_dlc.h3412 #define REG_SC_BK0F_56_L _PK_L_(0x0F, 0x56) macro
/utopia/UTPA2-700.0.x/modules/wble/hal/messi/wble/include/
H A Dhwreg_wble.h3410 #define REG_SC_BK0F_56_L _PK_L_(0x0F, 0x56) macro
/utopia/UTPA2-700.0.x/modules/wble/hal/M7821/wble/include/
H A Dhwreg_wble.h3410 #define REG_SC_BK0F_56_L _PK_L_(0x0F, 0x56) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/ace/include/
H A Dhwreg_ace.h3410 #define REG_SC_BK0F_56_L _PK_L_(0x0F, 0x56) macro
/utopia/UTPA2-700.0.x/modules/wble/hal/maxim/wble/include/
H A Dhwreg_wble.h3410 #define REG_SC_BK0F_56_L _PK_L_(0x0F, 0x56) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/M7621/dlc/include/
H A Dhwreg_dlc.h3412 #define REG_SC_BK0F_56_L _PK_L_(0x0F, 0x56) macro
/utopia/UTPA2-700.0.x/modules/wble/hal/mainz/wble/include/
H A Dhwreg_wble.h3410 #define REG_SC_BK0F_56_L _PK_L_(0x0F, 0x56) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/maserati/dlc/include/
H A Dhwreg_dlc.h3412 #define REG_SC_BK0F_56_L _PK_L_(0x0F, 0x56) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/mainz/dlc/include/
H A Dhwreg_dlc.h3412 #define REG_SC_BK0F_56_L _PK_L_(0x0F, 0x56) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/maldives/dlc/include/
H A Dhwreg_dlc.h3672 #define REG_SC_BK0F_56_L _PK_L_(0x0F, 0x56) macro
/utopia/UTPA2-700.0.x/modules/wble/hal/maldives/wble/include/
H A Dhwreg_wble.h3410 #define REG_SC_BK0F_56_L _PK_L_(0x0F, 0x56) macro

123